XE8000EV101 Semtech, XE8000EV101 Datasheet - Page 49
![EVAL BOARD FOR XE8801AMI027LF](/photos/9/22/92266/xe8000ev101_sml.jpg)
XE8000EV101
Manufacturer Part Number
XE8000EV101
Description
EVAL BOARD FOR XE8801AMI027LF
Manufacturer
Semtech
Type
MCUr
Specifications of XE8000EV101
Contents
Fully Assembled Evaluation Board
For Use With/related Products
XE88LC01AMI027
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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7.8 Prescalers
The clock generator block embeds two divider chains: the high prescaler and the low prescaler.
The high prescaler is made of an 8 stage dividing chain and the low prescaler of a 15 stage dividing chain.
Features:
7.9 32 kHz frequency selector
A decoder is used to select from the high prescaler the frequency tap that is the closest to 32 kHz to operate the
low prescaler when the Xtal is not running. In this case, the RC oscillator frequency of ±50% will also be valid for
the low prescaler frequency outputs.
© Semtech 2005
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High prescaler can only be driven with RC clock (bit EnableRc have to be set, see Table 7-12).
Low prescaler can be driven from the high prescaler or directly with the Xtal clock when bit EnableXtal is set to
Bit ResPre in the RegSysPre0 register allows to reset synchronously the low prescaler, the low prescaler is
Bit ColdXtal=1 indicates the Xtal is in its start up phase. It is active for 37268 Xtal cycles after setting
1, bit EnExtClock is set to 0 and ExtClk is equal at 0.
also automatically cleared when bit EnableXtal is set. Both dividing chains are reset asynchronously by the
resetsleep signal.
EnableXtal.
7-9
XE8801A – SX8801R
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