DEMO9S12XEP100 Freescale Semiconductor, DEMO9S12XEP100 Datasheet - Page 486

BOARD DEMO FOR MC9S12XEP100

DEMO9S12XEP100

Manufacturer Part Number
DEMO9S12XEP100
Description
BOARD DEMO FOR MC9S12XEP100
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of DEMO9S12XEP100

Contents
Board, Cables, CD
Processor To Be Evaluated
MC9S12XEP100
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12XE
Rohs Compliant
Yes
For Use With/related Products
MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DEMO9S12XEP100
Manufacturer:
PANASONIC
Quantity:
46 000
Part Number:
DEMO9S12XEP100
Manufacturer:
Freescale Semiconductor
Quantity:
135
Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
11.3.2.10 Reserved Register (FORBYP)
Read: Always read $00 except in special modes
Write: Only in special modes
11.3.2.11 Reserved Register (CTCTL)
Read: Always read $00 except in special modes
486
Module Base + 0x0009
Module Base + 0x000A
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
W
W
R
R
0
0
0
0
7
7
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in special
modes can alter the S12XECRG’s functionality.
This reserved register is designed for factory test purposes only, and is not
intended for general user access. Writing to this register when in special test
modes can alter the S12XECRG’s functionality.
= Unimplemented or Reserved
= Unimplemented or Reserved
1. OSCCLK cycles are referenced from the previous COP time-out reset
(writing $55/$AA to the ARMCOP register)
CR2
0
0
0
0
6
6
1
Figure 11-12. Reserved Register (FORBYP)
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 11-13. Reserved Register (CTCTL)
Table 11-13. COP Watchdog Rates
CR1
1
5
0
0
5
0
0
CR0
1
NOTE
NOTE
0
0
0
0
4
4
Cycles to Timeout
0
0
0
0
3
3
OSCCLK
2
24
(1)
2
0
0
2
0
0
Freescale Semiconductor
0
0
0
0
1
1
0
0
0
0
0
0

Related parts for DEMO9S12XEP100