C8051T630DK Silicon Laboratories Inc, C8051T630DK Datasheet - Page 10
![KIT DEV FOR C8051T630 FAMILY](/photos/9/23/92351/c8051t630dk_sml.jpg)
C8051T630DK
Manufacturer Part Number
C8051T630DK
Description
KIT DEV FOR C8051T630 FAMILY
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051T630DK
Contents
Board, daughter boards, power adapter, cables, documentation and software
Processor To Be Evaluated
C8051T63x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051T630, T631, T632, T633, T634 and T635 MCUs
For Use With
336-1465 - BOARD SOCKET DAUGHTER 20-QFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1464
- Current page: 10 of 220
- Download datasheet (2Mb)
C8051T630/1/2/3/4/5
List of Tables
2. Ordering Information
3. Pin Definitions
4. QFN-20 Package Specifications
5. Electrical Characteristics
6. 12. CIP-51 Microcontroller
14. Special Function Registers
15. Interrupts
16. EPROM Memory
20. Port Input/Output
21. SMBus
10
Table 2.1. Product Selection Guide ......................................................................... 17
Table 3.1. Pin Definitions for the C8051T630/1/2/3/4/5 ........................................... 18
Table 4.1. QFN-20 Package Dimensions ................................................................ 21
Table 4.2. QFN-20 PCB Land Pattern Dimesions ................................................... 22
Table 5.1. Absolute Maximum Ratings .................................................................... 23
Table 5.2. Global Electrical Characteristics ............................................................. 24
Table 5.3. Port I/O DC Electrical Characteristics ..................................................... 25
Table 5.4. Reset Electrical Characteristics .............................................................. 26
Table 5.5. Internal Voltage Regulator Electrical Characteristics ............................. 26
Table 5.6. EPROM Electrical Characteristics .......................................................... 26
Table 5.7. Internal High-Frequency Oscillator Electrical Characteristics ................. 27
Table 5.8. Internal Low-Frequency Oscillator Electrical Characteristics ................. 27
Table 5.9. ADC0 Electrical Characteristics .............................................................. 28
Table 5.10. Temperature Sensor Electrical Characteristics .................................... 29
Table 5.11. Voltage Reference Electrical Characteristics ....................................... 29
Table 5.12. IDAC Electrical Characteristics ............................................................. 30
Table 5.13. Comparator Electrical Characteristics .................................................. 31
Table 12.1. CIP-51 Instruction Set Summary .......................................................... 65
Table 14.1. Special Function Register (SFR) Memory Map .................................... 76
Table 14.2. Special Function Registers ................................................................... 77
Table 15.1. Interrupt Summary ................................................................................ 82
Table 16.1. Security Byte Decoding ........................................................................ 90
Table 20.1. Port I/O Assignment for Analog Functions ......................................... 112
Table 20.2. Port I/O Assignment for Digital Functions ........................................... 112
Table 20.3. Port I/O Assignment for External Digital Event Capture Functions .... 113
Table 21.1. SMBus Clock Source Selection .......................................................... 131
Table 21.2. Minimum SDA Setup and Hold Times ................................................ 132
Table 21.3. Sources for Hardware Changes to SMB0CN ..................................... 136
Table 21.4. Hardware Address Recognition Examples (EHACK = 1) ................... 137
Table 21.5. SMBus Status Decoding With Hardware ACK Generation Disabled
Table 21.6. SMBus Status Decoding With Hardware ACK Generation Enabled
(EHACK = 0) ....................................................................................... 144
(EHACK = 1) ....................................................................................... 146
Rev. 1.0
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