C8051T630DK Silicon Laboratories Inc, C8051T630DK Datasheet - Page 193

KIT DEV FOR C8051T630 FAMILY

C8051T630DK

Manufacturer Part Number
C8051T630DK
Description
KIT DEV FOR C8051T630 FAMILY
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051T630DK

Contents
Board, daughter boards, power adapter, cables, documentation and software
Processor To Be Evaluated
C8051T63x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051T630, T631, T632, T633, T634 and T635 MCUs
For Use With
336-1465 - BOARD SOCKET DAUGHTER 20-QFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1464
25.2. PCA0 Interrupt Sources
Figure 25.3 shows a diagram of the PCA interrupt tree. There are five independent event flags that can be
used to generate a PCA0 interrupt. They are: the main PCA counter overflow flag (CF), which is set upon
a 16-bit overflow of the PCA0 counter, an intermediate overflow flag (COVF), which can be set on an over-
flow from the 8th, 9th, 10th, or 11th bit of the PCA0 counter, and the individual flags for each PCA channel
(CCF0, CCF1, and CCF2), which are set according to the operation mode of that module. These event
flags are always set when the trigger condition occurs. Each of these flags can be individually selected to
generate a PCA0 interrupt, using the corresponding interrupt enable flag (ECF for CF, ECOV for COVF,
and ECCFn for each CCFn). PCA0 interrupts must be globally enabled before any individual interrupt
sources are recognized by the processor. PCA0 interrupts are globally enabled by setting the EA bit and
the EPCA0 bit to logic 1.
PCA Counter/Timer 8, 9,
PCA Counter/Timer 16-
10 or 11-bit Overflow
bit Overflow
W
M
P
1
6
n
PCA Module 0
PCA Module 1
PCA Module 2
(for n = 0 to 2)
PCA0CPMn
E
C
O
M
n
C
A
P
P
n
(CCF0)
(CCF1)
(CCF2)
C
N
A
P
n
M
A
T
n
O
G
T
n
W
M
P
n
E
C
C
F
n
C
F
C
R
PCA0CN
Figure 25.3. PCA Interrupt Block Diagram
C
C
F
2
C
C
F
1
C
C
F
0
ECCF0
ECCF1
ECCF2
C
D
L
I
W
D
T
E
PCA0MD
W
D
C
K
L
C
P
S
2
C
P
S
1
0
1
0
1
0
1
C
P
S
0
E
C
F
0
1
Rev. 1.0
A
R
S
E
L
E
C
O
V
PCA0PWM
C
O
V
F
0
1
C
L
S
E
L
1
C
S
E
L
L
0
C8051T630/1/2/3/4/5
Set 8, 9, 10, or 11 bit Operation
EPCA0
0
1
EA
0
1
Interrupt
Priority
Decoder
193

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