MCB2470 Keil, MCB2470 Datasheet - Page 42
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MCB2470
Manufacturer Part Number
MCB2470
Description
BOARD EVAL NXP LPC247X SERIES
Manufacturer
Keil
Type
MCUr
Specifications of MCB2470
Contents
Board, Cable, CD
For Use With/related Products
LPC2478
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
LPC2478_1
Preliminary data sheet
7.24.1 Features
7.24 Watchdog timer
7.25 RTC and battery RAM
The purpose of the watchdog is to reset the microcontroller within a reasonable amount of
time if it enters an erroneous state. When enabled, the watchdog will generate a system
reset if the user program fails to ‘feed’ (or reload) the watchdog within a predetermined
amount of time.
The RTC is a set of counters for measuring time when system power is on, and optionally
when it is off. It uses little power in Power-down mode. On the LPC2478, the RTC can be
clocked by a separate 32.768 kHz oscillator or by a programmable prescale divider based
on the APB clock. Also, the RTC is powered by its own power supply pin, VBAT, which can
be connected to a battery or to the same 3.3 V supply used by the rest of the device.
The VBAT pin supplies power only to the RTC and the Battery RAM. These two functions
require a minimum of power to operate, which can be supplied by an external battery.
When the CPU and the rest of chip functions are stopped and power removed, the RTC
can supply an alarm output that can be used by external hardware to restore chip power
and resume operation.
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Pulse period and width can be any number of timer counts. This allows complete
flexibility in the trade-off between resolution and repetition rate. All PWM outputs will
occur at the same repetition rate.
Double edge controlled PWM outputs can be programmed to be either positive going
or negative going pulses.
Match register updates are synchronized with pulse outputs to prevent generation of
erroneous pulses. Software must ‘release’ new match values before they can become
effective.
May be used as a standard timer if the PWM mode is not enabled.
A 32-bit Timer/Counter with a programmable 32-bit Prescaler.
Internally resets chip if not periodically reloaded.
Debug mode.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect/Incomplete feed sequence causes reset/interrupt if enabled.
Flag to indicate watchdog reset.
Programmable 32-bit timer with internal prescaler.
Selectable time period from (T
multiples of T
The Watchdog Clock (WDCLK) source can be selected from the RTC clock, the
Internal RC oscillator (IRC), or the APB peripheral clock. This gives a wide range of
potential timing choices of Watchdog operation under different power reduction
conditions. It also provides the ability to run the WDT from an entirely internal source
that is not dependent on an external crystal and its associated components and
wiring, for increased reliability.
cy(WDCLK)
Rev. 01 — 9 February 2007
× 4.
cy(WDCLK)
× 256 × 4) to (T
cy(WDCLK)
Fast communication chip
× 2
LPC2478
© NXP B.V. 2007. All rights reserved.
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