DK-EMB-3C120N Altera, DK-EMB-3C120N Datasheet - Page 12

KIT DEV EMB CYCLONE III EDITION

DK-EMB-3C120N

Manufacturer Part Number
DK-EMB-3C120N
Description
KIT DEV EMB CYCLONE III EDITION
Manufacturer
Altera
Series
Cyclone® IIIr
Type
FPGAr

Specifications of DK-EMB-3C120N

Contents
Board, Cables, CD(s), USB-Blaster™, Power Supply
Architecture
PLD/FPGA
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Cyclone
Silicon Core Number
EP3C
Silicon Family Name
Cyclone III
Rohs Compliant
Yes
For Use With/related Products
EP3C120
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2589

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DK-EMB-3C120N
Manufacturer:
Altera
Quantity:
135
Part Number:
DK-EMB-3C120N
Manufacturer:
ALTERA
0
Devices
Stratix II GX FPGA Features
1
2
10
Maximum PLLs/unique outputs, LVDS channels, and transceiver channels for the product line shown. Various packages offer a variety of options to meet your design needs.
This is the base core logic register count. The ALM can support three registers when used in LUTREG mode, which increases the total register count by an additional 50 percent.
ALMs
Equivalent LEs
Registers
M512 memory blocks
M4K memory blocks
M512K memory blocks
Embedded memory (Kb)
18-bit x 18-bit multipliers
Speed grades (fastest to slowest)
Global clock networks
Regional clock networks
PLLs/unique outputs
Design security
Configuration file size (Mb)
HardCopy series device support
Others
I/O voltage levels supported (V)
I/O standards supported
Emulated LVDS channels,
1,100 Mbps
LVDS channels, 1,000 Mbps
(receive/transmit)
Embedded DPA circuitry
Series and differential OCT
Transceiver (SERDES) channels
(6.375 Gbps)
Memory devices supported
Altera Product Catalog
2
2011
www.altera.com
LVDS, LVPECL, HyperTransport
EP2SGX30
II), SSTL-2 (I and II), 1.5-V HSTL (I and II), 1.8-V HSTL (I and II), PCI, PCI-X 1.0, LVTTL, LVCMOS
13,552
33,880
27,104
1,338
31/29
31/29
4/18
202
144
64
10
1
8
Stratix II GX FPGAs (1.2 V), 6.375-Gbps Transceivers
, Differential SSTL-18, Differential SSTL-2,Differential HSTL, SSTL-18 (I and
EP2SGX60
See supported protocols and data rates on page 63
DDR2, DDR, QDR II, RLDRAM II, SDR
24,176
60,440
48,352
2,485
42/42
42/42
329
255
144
8/36
17
12
2
Plug & Play Signal Integrity
1.5, 1.8, 2.5, 3.3
-3, -4, -5
48
48
3
3
3
EP2SGX90
36,384
90,960
72,708
4,415
59/59
59/59
8/36
488
408
192
28
16
4
1
EP2SGX130
132,540
106,032
53,016
73/71
73/71
6,590
8/36
699
609
252
40
20
6

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