AT32UC3L-EK Atmel, AT32UC3L-EK Datasheet - Page 469

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AT32UC3L-EK

Manufacturer Part Number
AT32UC3L-EK
Description
KIT EVAL AVR32 UC3 MCU
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of AT32UC3L-EK

Contents
*
Silicon Manufacturer
Atmel
Core Architecture
AVR
Core Sub-architecture
UC3L
Kit Contents
Board
Features
USB / Battery Powered, Board Controller / Bootloader
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Tool Type
Starter Kit
Cpu Core
AVR 8
Data Bus Width
8 bit
Processor Series
AT32
Processor To Be Evaluated
AT32UC3L064
Interface Type
USB, Capacitive Touch
For Use With/related Products
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3L-EK
Manufacturer:
Atmel
Quantity:
135
21.5
21.6
Table 21-4.
21.7
21.7.1
21.7.2
32099F–11/2010
Pin Name
TWD
TWCK
TWALM
Application Block Diagram
I/O Lines Description
Product Dependencies
I/O Lines
Power Management
I/O Lines Description
Figure 21-2. Application Block Diagram
In order to use this module, other parts of the system must be configured correctly, as
described below.
Both TWD and TWCK are bidirectional lines, connected to a positive supply voltage via a cur-
rent source or pull-up resistor (see
are high. The output stages of devices connected to the bus must have an open-drain or open-
collector to perform the wired-AND function.
TWALM is used to implement the optional SMBus SMBALERT signal.
The TWALM, TWD, and TWCK pins may be multiplexed with I/O Controller lines. To enable
the TWIM, the programmer must perform the following steps:
If the CPU enters a sleep mode that disables clocks used by the TWIM, the TWIM will stop
functioning and resume operation after the system wakes up from sleep mode.
• Program the I/O Controller to:
Rp: Pull up value as given by the I²C Standard
Master
Pin Description
Two-wire Serial Data
Two-wire Serial Clock
SMBus SMBALERT
TWI
– Dedicate TWD, TWCK and optionally TWALM as peripheral lines.
– Define TWD, TWCK and optionally TWALM as open-drain.
TWD
TWCK
serial EEPROM
Atmel TWI
Slave 1
Figure 21-2 on page
I²C RTC
Slave 2
controller
I²C LCD
Slave 3
AT32UC3L016/32/64
469). When the bus is free, both lines
I²C temp.
Slave 4
sensor
Rp
Input/Output
Input/Output
Input/Output
Type
Rp
VDD
469

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