ADSP-3PARCBF548E02 Analog Devices Inc, ADSP-3PARCBF548E02 Datasheet - Page 57
![KIT DEV STARTER BF548](/photos/9/25/92500/adsp-3parcbf548e02_kit_sml.jpg)
ADSP-3PARCBF548E02
Manufacturer Part Number
ADSP-3PARCBF548E02
Description
KIT DEV STARTER BF548
Manufacturer
Analog Devices Inc
Series
Blackfin®r
Type
DSPr
Specifications of ADSP-3PARCBF548E02
Contents
Board, Cables, CD, Headset with Microphone, Module, Power Supply
For Use With/related Products
ADSP-BF548
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 57 of 100
- Download datasheet (4Mb)
Synchronous Burst AC Timing
Table 38
AC operations.
Table 38. Synchronous Burst AC Timing
Parameter
Timing Requirements
t
t
t
t
Switching Characteristics
t
t
NDS
NDH
NWS
NWH
NDO
NHO
and
Figure 28 on Page 57
DATA15-0 Setup Before NR_CLK
DATA15-0 Hold After NR_CLK
WAIT Setup Before NR_CLK
WAIT Hold After NR_CLK
AMSx, ABE1-0, ADDR19-1, NR_ADV, NR_OE Output Delay After NR_CLK
ABE1-0, ADDR19-1 Output Hold After NR_CLK
ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
NOTE: NR_CLK dotted line represents a free running version of NR_CLK that is not visible on the NR_CLK pin.
ADDR19-1
DATA15-0
NR_CLK
NR_ADV
ABE1-0
NR_OE
AMSx
WAIT
describe Synchronous Burst
t
NDO
Figure 28. Synchronous Burst AC Interface Timing
t
t NDO
t NDO
Rev. C | Page 57 of 100 | February 2010
NDO
t
t
NDO
NDO
t
NWS
t
NDS
Dn
Dn+1
t NDH
t
t NDS
NHO
t
Dn+2
NDO
Dn+3
t
t
NDH
NWH
t
t
NDO
NHO
Min
4.0
2.0
8.0
0.0
6.0
–3.0
Max
Unit
ns
ns
ns
ns
ns
ns
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