C8051F326-TB Silicon Laboratories Inc, C8051F326-TB Datasheet - Page 124
C8051F326-TB
Manufacturer Part Number
C8051F326-TB
Description
BOARD PROTOTYPING W/C8051F326
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.C8051F326-TB.pdf
(140 pages)
Specifications of C8051F326-TB
Contents
Board
Processor To Be Evaluated
C8051F326/F327
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F326
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Bit7:
Bits6–5: S0PT[1:0]: Parity Type.
Bit4:
Bits3–2: S0DL[1:0]: Data Length.
Bit1:
Bit0:
MCE0
R/W
Bit7
MCE0: Multiprocessor Communication Enable.
0: RI will be activated if stop bit(s) are ‘1’.
1: RI will be activated if stop bit(s) and extra bit are ‘1’ (extra bit must be enabled using
XBE0).
Note: This function is not available when hardware parity is enabled.
00: Odd
01: Even
10: Mark
11: Space
PE0: Parity Enable.
This bit activates hardware parity generation and checking. The parity type is selected by
bits S0PT1-0 when parity is enabled.
0: Hardware parity is disabled.
1: Hardware parity is enabled.
00: 5-bit data
01: 6-bit data
10: 7-bit data
11: 8-bit data
XBE0: Extra Bit Enable
When enabled, the value of TBX0 will be appended to the data field.
0: Extra Bit Disabled.
1: Extra Bit Enabled.
SBL0: Stop Bit Length
0: Short - Stop bit is active for one bit time (all data field lengths).
1: Long - Stop bit is active for two bit times (data length = 6, 7, or 8 bits).
S0PT1
R/W
Bit6
SFR Definition 13.2. SMOD0: UART0 Mode
S0PT0
R/W
Bit5
PE0
R/W
Bit4
Rev. 1.1
S0DL1
R/W
Bit3
S0DL0
R/W
Bit2
XBE0
R/W
Bit1
SFR Address:
SBL0
R/W
Bit0
0x9A
00001100
Addressable
Reset Value
Bit
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