AD9954/PCB Analog Devices Inc, AD9954/PCB Datasheet - Page 9

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AD9954/PCB

Manufacturer Part Number
AD9954/PCB
Description
BOARD EVAL FOR AD9954
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9954/PCB

Rohs Status
RoHS non-compliant
Pin No.
31
35
36
37
38
39
40
41
43
44
45
46
47, 48
<49>
Mnemonic
COMP_IN
PWRDWNCTL
RESET
IOSYNC
SDO
CS
SCLK
SDIO
DVDD_I/O
SYNC_IN
SYNC_CLK
OSK
PS0, PS1
AGND
I/O
I
I
I
I
O
I
I
I/O
I
I
O
I
I
I
Description
Comparator Complementary Input.
Input Pin Used as an External Power-Down Control (see Table 9 for details).
Active High Hardware Reset Pin. Assertion of the RESET pin forces the AD9954 to the default
state, as described in the right-hand column of Table 12, which is the I/O port register map.
Asynchronous Active High Reset of the Serial Port Controller. When high, the current I/O
operation is immediately terminated, enabling a new I/O operation to commence once
IOSYNC is returned low. If unused, ground this pin; do not allow this pin to float.
See Serial Interface Port Pin Description section for details.
See Serial Interface Port Pin Description section for details.
See Serial Interface Port Pin Description section for details.
See Serial Interface Port Pin Description section for details.
Digital Power Supply. This pin is for I/O cells only, 3.3 V.
Input Signal Used to Synchronize Multiple AD9954s. This input is connected to the SYNC_CLK
output of a master AD9954.
Clock Output Pin that Serves as a Synchronizer for External Hardware.
Input Pin Used to Control the Direction of the Shaped On-Off Keying Function When Programmed
for Operation. OSK is synchronous to the SYNC_CLK pin. When OSK is disabled, this pin should
be tied to DGND.
Input Pins Used to Select One of the Internal Phase/Frequency Profiles. PS1 and PS0 are
synchronous to the SYNC_CLK pin. Change on these pins triggers a transfer of the contents of
the chosen internal buffer memory to the I/O registers (sends an internal I/O UPDATE).
The Exposed Paddle on the Bottom of the Package. It is a ground connection for the DAC and
must be attached to AGND in any board layout.
Rev. B | Page 9 of 40
AD9954

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