EVALPM6680 STMicroelectronics, EVALPM6680 Datasheet - Page 24

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EVALPM6680

Manufacturer Part Number
EVALPM6680
Description
BOARD EVALUATION FOR PM6680
Manufacturer
STMicroelectronics
Datasheet

Specifications of EVALPM6680

Mfg Application Notes
PM6680 Eval Kit, AN2566 App Note
Main Purpose
DC/DC, Step Down with LDO
Outputs And Type
3, Non-Isolated
Power - Output
13.25W
Voltage - Output
1.05V, 1.5V, 5V
Current - Output
5A, 5A, 100mA
Voltage - Input
6 ~ 28V
Regulator Topology
Buck
Frequency - Switching
200kHz, 300kHz
Board Type
Fully Populated
Utilized Ic / Part
PM6680
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6241

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EVALPM6680
Manufacturer:
ST
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Part Number:
EVALPM6680A
Manufacturer:
ST
0
Device description
7.3
24/49
Output ripple compensation and loop stability
In a classic Constant On Time control, the system regulates the valley value of the output
voltage and not the average value, as shown in
voltage ripple is source of a DC static error.
To compensate this error, an integrator network can be introduced in the control loop, by
connecting the output voltage to the COMP1/COMP2 (for the OUT1 and OUT2 sections
respectively) pin through a capacitor C
Figure 30. Circuitry for output ripple compensation
The integrator amplifier generates a current, proportional to the DC errors between the FB
voltage and Vr, which decreases the output voltage in order to compensate the total static
error, including the voltage drop on PCB traces. In addition, C
output ripple. In steady state, the voltage on COMP1/COMP2 pin is the sum of the reference
voltage Vr and the output ripple (see
reaches Vr, a fixed Ton begins and the output increases.
For example, we consider Vout = 5 V with an output ripple of ∆V = 50 mV. Considering
C
assures an AC path for the output voltage ripple. Then the COMP pin ripple is a replica of
the output ripple, with a DC value of Vr + 25 mV = 925 mV.
For more details about the output ripple compensation network, see the
Closing the integrator loop on page 37
In steady state the FB pin voltage is about Vr and the regulated output voltage depends on
the external divider:
Equation 4
INT
>> C
FILT
, the C
OUTPUT
VOLTAGE
Vr
INT
t
COMP PIN
VOLTAGE
DC voltage drop V
D
D
∆V
L
L
t
C
C
R
R
∆V
O
O
O
O
C
U
OUT
C
U
U
U
T
T
T
T
Figure
F
F
C
R
C
R
I
I
INT
L
L
in the Design guidelines.
I
I
I
I
T
T
N
N
N
N
T
T
T
T
=
CINT
as in
Vr
30). In fact when the voltage on the COMP pin
V
V
C
C
×
R
R
C
C
R
R
is about 5 V-Vr+25 mV = 4.125 V. C
O
Figure 30
O
I
I
Figure 28
N
N
2
2
1
1
O
O
T
T
1
M
M
U
U
+
F
F
P
P
T
T
B
B
R
------ -
R
2
1
I=gm(V1-Vr)
V
V
r
In this condition, the output
r
g
g
m
m
+
INT
V
V
1
1
V
V
provides an AC path for the
r
r
C
C
+
-
o
o
m
m
P
P
p
W
W
p
a
a
M
M
Section 7.13.6:
r
r
a
a
t
t
o
o
r
r
INT
PM6680

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