COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 197
COP8SA-DM
Manufacturer Part Number
COP8SA-DM
Description
MODULE DEBUGGING FOR COP8SA
Manufacturer
National Semiconductor
Datasheet
1.DM-COP820D.pdf
(254 pages)
Specifications of COP8SA-DM
Module/board Type
Debugger Module
For Use With/related Products
Cop 8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*COP8SA-DM
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4.2.2
This example shows the COP8SAx7 interface to a NM93C06, a 256-bit E
the MICROWIRE/PLUS interface. The pin connections for the interface is shown in
Figure 4-4. Some notes on the NM93C06 interface requirements are:
1. Set the MSEL bit in the CNTRL register to enable MICROWIRE; G0 and G5
2. Normal mode of operation until interrupted by CS going low.
3. Set the BUSY flag and load SIOR register with the data to be sent out on S0.
4. Wait for the BUSY flag to be reset. (The BUSY flag automatically resets after
5. If data is being read in, the contents of the SIO register are saved.
6. The prearranged set of data transfers are performed.
7. Repeat steps 3 through 6. The user must ensure step 3 is performed within t-
1. The SK clock frequency should be less than 250 KHz. The SK clock should be
NM93C06-COP8SAx7 Interface
are configured as inputs and G4 as an output. Reset bit 6 of the Port G con-
figuration register to select Standard SK Clocking mode.
(The shift register shifts eight bits of data from S0 at the high-order end of
the shift register. Concurrently, eight new bits of data from SI are loaded into
the low-order end of the shift register.)
8 bits of data have been shifted.)
time (refer to Figure 4-3) as agreed upon in the protocol.
configured for standard SK mode.
CKI
CKO
COP8SAx7
Figure 4-4 NM93C06-COP8SAx7 Interface
V
CC
GND
GO
SO
SK
SI
DI
DO
SK
CS
COP8SAx7 APPLICATION IDEAS
NM93C06
GND
2
PROM, using
V
CC
4-5
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