COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 199
COP8SA-DM
Manufacturer Part Number
COP8SA-DM
Description
MODULE DEBUGGING FOR COP8SA
Manufacturer
National Semiconductor
Datasheet
1.DM-COP820D.pdf
(254 pages)
Specifications of COP8SA-DM
Module/board Type
Debugger Module
For Use With/related Products
Cop 8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*COP8SA-DM
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;This program provides in the form of subroutines, the ability to erase,
;enable, disable, read and write to the NMC93C06 EEPROM.
.INCLD
NMCMEM: .DSB 5
ADRESS: .DSB 1
FLAGS:
DLYH:
DLYL:
;The interface consists of four
;lines: The G0 (chip select line), G4 (serial out SO), G5 (serial clock SK), and
;G6 (serial in SI).
;
; Initialization
;
;This routine erases the memory location pointed to by the address contained in the
;location “ADRESS.” The lower nibble of “ADRESS” contains the NM93C06 register
;address and the upper nibble should be set to zero.
;
ERASE:
;This routine enables programming of the NM93C06. Programming must be preceded
;once by a programming enable (EWEN).
;
EWEN:
;This routine disables programming of the NM93C06
;
EWDS:
COP888.INC
.SECT
SNDBUF = NMCMEM
RDATL
RDATH
WDATL
WDATH
.DSB 1
.SECT
.DSB 1
.DSB 1
.SECT
LD
LD
LD
LD
LD
LD
OR
X
LD
JSR
RET
LD
LD
JSR
RET
LD
LD
JSR
RET
= NMCMEM+1
= NMCMEM+2
= NMCMEM+3
= NMCMEM+4
NMC, RAM
CNT, REG
NMCODE, ROM
PORTGC,#031 ;Setup G0, G4, G5 as outputs and
PORTGD,#00
CNTRL,#08
B,#PSW
X,#SIOR
A,ADRESS
A,#0C0
A,SNDBUF
FLAGS,#0
INIT
SNDBUF,#030
FLAGS,#0
INIT
SNDBUF,#0
FLAGS,#0
INIT
;Contains the command byte to be written NM93C06
;Lower byte of NM93C06 register data read
;Upper byte of NM93C06 register data read
;Lower byte of data to be written to NM93C06 register
;Upper byte of data to be written to NM93C06 register
;Lower 4-bits of this location contain the address of
;the NMC93C06 register to read/write
;Used for setting up flags
;Flag valueAction
;00Erase, enable, disable, erase all
;01Read contents of NMC93C06 register
;03Write to NMC93C06 register
;OthersIllegal combination
;Delay counter register
;Delay counter register
;select standard SK mode
;Initialize G data reg to zero
;Enable MSEL, select MW rate of 2tc
COP8SAx7 APPLICATION IDEAS
4-7
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