HW-SPAR3E-SK-US-G Xilinx Inc, HW-SPAR3E-SK-US-G Datasheet - Page 151

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HW-SPAR3E-SK-US-G

Manufacturer Part Number
HW-SPAR3E-SK-US-G
Description
KIT STARTER SPARTAN-3E
Manufacturer
Xilinx Inc
Datasheets

Specifications of HW-SPAR3E-SK-US-G

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1507
Configuration Clock (CCLK) Characteristics
Table 112: Master Mode CCLK Output Period by ConfigRate Option Setting
Table 113: Master Mode CCLK Output Frequency by ConfigRate Option Setting
Table 114: Master Mode CCLK Output Minimum Low and High Time
DS312-3 (v3.8) August 26, 2009
Product Specification
Notes:
1.
T
T
T
T
T
T
F
F
F
F
F
F
T
T
Symbol
Symbol
Symbol
CCLK1
CCLK3
CCLK6
CCLK12
CCLK25
CCLK50
CCLK1
CCLK3
CCLK6
CCLK12
CCLK25
CCLK50
MCCL,
MCCH
Set the ConfigRate option value when generating a configuration bitstream. See
R
Master mode CCLK minimum
Low and High time
CCLK clock period by
ConfigRate setting
Equivalent CCLK clock
frequency by ConfigRate
setting
Description
Description
Description
Commercial
Industrial
and default value)
and default value)
(power-on value
(power-on value
ConfigRate
ConfigRate
Setting
Setting
12
25
50
12
25
50
www.xilinx.com
1
3
6
1
3
6
235
276
1
Temperature
Temperature
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Range
Range
138
117
3
Bitstream Generator (BitGen) Options
ConfigRate Setting
69
58
6
Minimum
Minimum
DC and Switching Characteristics
71.2
60.6
35.5
30.3
17.8
15.1
12.8
25.6
570
485
285
242
142
121
0.8
1.6
3.2
6.4
34.5
29.3
12
17.1
14.5
25
Maximum
Maximum
1,250
78.2
39.1
14.1
16.5
28.1
33.0
56.2
66.0
625
313
157
1.8
3.6
7.1
2.1
4.2
8.3
7.3
8.5
50
in Module 2.
Units
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
151

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