MAX17009GTL+ Maxim Integrated Products, MAX17009GTL+ Datasheet - Page 18

• Manufacturer Part Number: MAX17009GTL+
• Description: IC CTLR VIDEO SERIAL DUAL 40TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX17009GTL+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AMD Mobile Serial VID Dual-Phase
Fixed-Frequency Controller
18
PIN
33
34
35
36
37
38
______________________________________________________________________________________
OPTION
PGD_IN
FBAC1
NAME
CSN1
CSP1
Protection Disable.
Connect
Connect
When
the 2-bit boot VID. When PGD_IN is high, the MAX17009 changes to serial VID mode.
Positive Current-Sense Input for SMPS1. Connect to the positive side of the output current-sensing resistor
or the filtering capacitor if the DC resistance of the output inductor is utilized for current sensing.
Negative Current-Sense Input for SMPS1. Connect to the negative side of the output current-sensing resistor
or the filtering capacitor if the DC resistance of the output inductor is utilized for current sensing.
System Power-Good Input. Indicates to the MAX17009 that the system is ready to enter serial VID mode.
PGD_IN is low when
voltage. The boot VID can be changed dynamically while PGD_IN remains low and PWRGD. The boot
VID is stored after PWRGD goes high.
PGD_IN goes high after the MAX17009 reaches the boot voltage. This indicates that the SVI block is
active, and the MAX17009 starts to respond to the serial-interface commands.
After PGD_IN has gone high, if at anytime PGD_IN should go low, the MAX17009 regulates to the
previously stored boot VID.
Four-Level Input to Enable Offset and Transient-Phase Repeat
When OFFSET is enabled, the MAX17009 enables a fixed +12.5mV offset on each of the SMPS VID
codes after PGD_IN goes high. This configuration is intended for applications that implement a load-
line. An external resistor at FBDC_ sets the load-line. The offset can be disabled by setting the PSI_L
bit to zero through the serial interface.
When OFFSET is disabled, the intended application has no load-line, and the FBDC_ pins are directly
connected to the remote-sense points.
Transient phase repeat allows the MAX17009 to reenable the current phase in response to a load
transient, even after that phase has finished its on-pulse.
Output of the AC Voltage-Positioning Transconductance Amplifier for SMPS1. The resistance between
this pin and the positive side of the remote-sensed output voltage sets the transient AC droop:
where R
between stability and load-transient response, G
resistor that is used to
The maximum difference between transient (AC) droop and DC droop should not exceed ±80mV at the
maximum allowed load current (DC droop is set at the FBDC2 pin).
Internally, V(FBDC1 - GNDS1) goes to the internal voltage integrator (slow DC loop), whereas V(FBAC1
- GNDS1) goes to the error comparator (fast-transient loop).
FBAC1 is high impedance in shutdown.
Note: The AC and DC droop cannot be different by more than ±3mV/A.
pin description). When PGD_IN is low in debug mode, the MAX17009 DAC voltages are set by
DROOPAC
OPTION
is floated, the MAX17009 disables the OVP protection and also enters debug mode (see the
OPEN
GND
REF
V
high to disable OVP protection.
to GND to enable OVP protection.
CC
is the transient (AC) voltage-positioning slope that
also sets the MAX17009 in debug mode.
first goes high, the MAX17009 decodes the boot VID to determine the boot
vide the (CSP1, CSN1) current-sense voltage.
R
FBAC1
OFFSET ENABLED
= R
DROOPAC
0
0
1
1
FUNCTION
m(FBAC1)
/ (R
SENSE1
Pin Description (continued)
and R
TRANSIENT-PHASE REPEAT ENABLED
x G
SENSE1
m(FBAC1)
is the value of the current-sense
vides an acceptable tradeoff
)
0
1
0
1