MAX17009GTL+ Maxim Integrated Products, MAX17009GTL+ Datasheet - Page 40

• Manufacturer Part Number: MAX17009GTL+
• Description: IC CTLR VIDEO SERIAL DUAL 40TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX17009GTL+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse that is associated with this acknowledge bit. The
device that acknowledges has to pull down the SVD
line during the acknowledge clock pulse so the SVD
line is stable LOW during the HIGH period of the
acknowledge-related clock pulse. Setup and hold times
must be taken into account. See Figure 11. Figure 12
shows the SVI bus data transfer summary.
A complete command consists of a START condition
(S) followed by the MAX17009’s slave address and a
data phase, followed by a STOP condition (P).
AMD Mobile Serial VID Dual-Phase
Fixed-Frequency Controller
Figure 11. SVI Bus Acknowledge
Figure 12. SVI Bus Data Transfer Summary
40
DATA OUTPUT
DATA OUTPUT
BY MAX17009
BY MASTER
SVC FROM
______________________________________________________________________________________
MASTER
CONDITION
START
S
S
T
A
R
T
S
SLAVE ADDRESS
CLK1
D7
1
Command Byte
Acknowledge
CLK2
D6
2
A
C
K
SET DAC AND PSI_L
The minimum input operating voltage (dropout voltage)
is restricted by stability requirements, not the minimum
off-time (t
slope compensation, so the controller becomes unsta-
ble with duty cycles greater than 50% per phase:
However, the controller can briefly operate with duty
cycles over 50% during heavy load transients.
SMPS Applications Information
OFF(MIN)
ACKNOWLEDGE
V
NOT ACKNOWLEDGE
IN(MIN)
CLK8
D0
8
). The MAX17009 does not include
≥ 2 x V
A
C
K
ACKNOWLEDGE
CLOCK PULSE
Minimum Input Voltage
OUT(MAX)
CLK9
S
T
O
P
P
Duty-Cycle Limits
9