DSPIC30F2011-20I/P Microchip Technology, DSPIC30F2011-20I/P Datasheet - Page 195

IC DSPIC MCU/DSP 12K 18DIP

DSPIC30F2011-20I/P

Manufacturer Part Number
DSPIC30F2011-20I/P
Description
IC DSPIC MCU/DSP 12K 18DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F2011-20I/P

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
12
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Package
18PDIP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
12
Interface Type
I2C/SPI/UART
On-chip Adc
8-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC30F005 - MODULE SCKT DSPIC30F 18DIP/SOICACICE0202 - ADAPTER MPLABICE 18P 300 MIL
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F2011-20IP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2011-20I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
APPENDIX A:
Revision D (August 2006)
Previous versions of this data sheet contained
Advance or Preliminary Information. They were
distributed with incomplete characterization data.
This revision reflects these updates:
• Supported I
• ADC Conversion Clock selection to allow
• Operating Current (I
• Idle Current (I
• Power-Down Current (I
• I/O pin Input Specifications
• BOR voltage limits
• Watchdog Timer time-out limits
Revision E (December 2006)
This revision includes updates to the packaging
diagrams.
© 2008 Microchip Technology Inc.
(see Table 14-1)
200 kHz sampling rate (see Section 16.0 “12-bit
Analog-to-Digital Converter (ADC) Module”)
(see Table 20-5)
(see Table 20-6)
(see Table 20-7)
(see Table 20-8)
(see Table 20-11)
(see Table 20-21)
2
C Slave Addresses
IDLE
) Specifications
DD
REVISION HISTORY
) Specifications
PD
) Specifications
dsPIC30F2011/2012/3012/3013
Revision F (May 2008)
This revision reflects these updates:
• Added FUSE Configuration Register (FICD)
• Added Note 2 to Device Configuration Registers
• Updated Bit 10 in the UART2 Register Map (see
• Electrical Specifications:
• Additional minor corrections throughout the
details (see Section 17.7 “Device Configuration
Registers” and Table 17-8)
table (Table 17-8)
Table 15-2). This bit is unimplemented.
- Resolved TBD values for parameters DO10,
- 10-bit High-Speed ADC t
- Parameter OS65 (Internal RC Accuracy) has
- Parameter DC12 (RAM Data Retention
- Parameter D134 (Erase/Write Cycle Time)
- Removed parameters OS62 (Internal FRC
- Parameter OS63 (Internal FRC Accuracy)
- Updated Min and Max values and Conditions
document
DO16, DO20, and DO26 (see Table 20-9)
parameter (time to stabilize) has been
updated from 20 µs typical to 20 µs maximum
(see Table 20-37)
been expanded to reflect multiple Min and
Max values for different temperatures (see
Table 20-19)
Voltage) has been updated to include a Min
value (see Table 20-4)
has been updated to include Min and Max
values and the Typ value has been removed
(see Table 20-12)
Jitter) and OS64 (Internal FRC Drift) and
Note 2 from AC Characteristics (see
Table 20-18)
has been expanded to reflect multiple Min
and Max values for different temperatures
(see Table 20-18)
for parameter SY11 and updated Min, Typ,
and Max values and Conditions for
parameter SY20 (see Table 20-21)
PDU
timing
DS70139F-page 195

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