PIC16F88-I/ML Microchip Technology, PIC16F88-I/ML Datasheet - Page 143

IC MCU FLASH 4KX14 EEPROM 28QFN

PIC16F88-I/ML

Manufacturer Part Number
PIC16F88-I/ML
Description
IC MCU FLASH 4KX14 EEPROM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F88-I/ML

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
SSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNAC164033 - ADAPTER 28QFN TO 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Lead Free Status / Rohs Status
 Details
1997 Microchip Technology Inc.
When peripheral functions are multiplexed onto general I/O pins, the functionality of the I/O pins
may change to accommodate the requirements of the peripheral module. Examples of this are
the Analog-to-Digital (A/D) converter and LCD driver modules, which force the I/O pin to the
peripheral function when the device is reset. In the case of the A/D, this prevents the device from
consuming excess current if any analog levels were on the A/D pins after a reset occurred.
With some peripherals, the TRIS bit is overridden while the peripheral is enabled. Therefore,
read-modify-write instructions (BSF, BCF, XORWF) with TRIS as destination should be avoided.
The user should refer to the corresponding peripheral section for the correct TRIS bit settings.
PORT pins may be multiplexed with analog inputs and analog V
of these pins is selected, to be an analog input or digital I/O, by clearing/setting the control bits
in the ADCON1 register (A/D Control Register1). When selected as an analog input, these pins
will read as ‘0’s.
The TRIS registers control the direction of the port pins, even when they are being used as ana-
log inputs. The user must ensure the TRIS bits are maintained set when using the pins as analog
inputs.
Note 1: If pins are multiplexed with Analog inputs, then on a Power-on Reset these pins are
Note 2: If pins are multiplexed with comparator inputs, then on a Power-on Reset these pins
Note 3: If pins are multiplexed with LCD driver segments, then on a Power-on Reset these
Note 4: Pins may be multiplexed with the Parallel Slave Port (PSP). For the PSP to function,
Note 5: At present the Parallel Slave Port (PSP) is only multiplexed onto PORTD and
configured as analog inputs, as controlled by the ADCON1 register. Reading port
pins configured as analog inputs read a ‘0’.
are configured as analog inputs, as controlled by the CMCON register. Reading port
pins configured as analog inputs read a ‘0’.
pins are configured as LCD driver segments, as controlled by the LCDSE register.
To configure the pins as a digital port, the corresponding bits in the LCDSE register
must be cleared. Any bit set in the LCDSE register overrides any bit settings in the
corresponding TRIS register.
the I/O pins must be configured as digital inputs and the PSPMODE bit must be set.
PORTE. The microprocessor port becomes enabled when the PSPMODE bit is set.
In this mode, the user must make sure that the TRISE bits are set (pins are config-
ured as digital inputs) and that PORTE is configured for digital I/O. PORTD will over-
ride the values in the TRISD register. In this mode the PORTD and PORTE input
buffers are TTL. The control bits for the PSP operation are located in TRISE.
Section 9. I/O Ports
REF
input. The operation of each
DS31009A-page 9-3
9

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