PIC16F88-I/ML Microchip Technology, PIC16F88-I/ML Datasheet - Page 52

IC MCU FLASH 4KX14 EEPROM 28QFN

PIC16F88-I/ML

Manufacturer Part Number
PIC16F88-I/ML
Description
IC MCU FLASH 4KX14 EEPROM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F88-I/ML

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
SSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNAC164033 - ADAPTER 28QFN TO 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Lead Free Status / Rohs Status
 Details
PICmicro MID-RANGE MCU FAMILY
3.1
DS31003A-page 3-2
Introduction
The reset logic is used to place the device into a known state. The source of the reset can be
determined by using the device status bits. The reset logic is designed with features that reduce
system cost and increase system reliability.
Devices differentiate between various kinds of reset:
a)
b)
c)
d)
e)
f)
Most registers are unaffected by a reset; their status is unknown on POR and unchanged by all
other resets. The other registers are forced to a “reset state” on Power-on Reset, MCLR, WDT
reset, Brown-out Reset, Parity Error Reset, and on MCLR reset during SLEEP.
The on-chip parity bits that can be used to verify the contents of program memory.
Most registers are not affected by a WDT wake-up, since this is viewed as the resumption of nor-
mal operation. Status bits TO, PD, POR, BOR, and PER are set or cleared differently in different
reset situations as indicated in
of the reset. See
A simplified block diagram of the on-chip reset circuit is shown in
is a superset of reset features. To determine the features that are available on a specific device,
please refer to the device’s Data Sheet.
All new devices will have a noise filter in the MCLR reset path to detect and ignore small pulses.
See
Note:
Power-on Reset (POR)
MCLR reset during normal operation
MCLR reset during SLEEP
WDT reset during normal operation
Brown-out Reset (BOR)
Parity Error Reset (PER)
parameter 30
While the PICmicro™ is in a reset state, the internal phase clock is held at Q1
(beginning of an instruction cycle).
Table 3-4
in the
“Electrical Specifications”
for a full description of the reset states of all registers.
Table
3-2. These bits are used in software to determine the nature
section for pulse width specification.
Figure
1997 Microchip Technology Inc.
3-1. This block diagram

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