DSPIC30F3012-20I/SO Microchip Technology, DSPIC30F3012-20I/SO Datasheet - Page 199

• Manufacturer Part Number: DSPIC30F3012-20I/SO
• Description: IC DSPIC MCU/DSP 24K 18SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3012-20I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 24KB (8K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 12
• Flash Memory Size: 24KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC30F005 - MODULE SCKT DSPIC30F 18DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F301220ISO

APPENDIX A:
Revision D (August 2006)
Previous versions of this data sheet contained
Advance or Preliminary Information. They were
distributed with incomplete characterization data.
This revision reflects these updates:
• Supported I
• ADC Conversion Clock selection to allow
• Operating Current (I
• Idle Current (I
• Power-Down Current (I
• I/O pin Input Specifications
• BOR voltage limits
• Watchdog Timer time-out limits
Revision E (December 2006)
This revision includes updates to the packaging
diagrams.
© 2010 Microchip Technology Inc.
(see
200 kHz sampling rate (see
Analog-to-Digital Converter (ADC)
(see
(see
(see
(see
(see
(see
Table
Table
Table
Table
Table
Table
Table
14-1)
20-5)
20-6)
20-7)
20-8)
20-11)
20-21)
2
C Slave Addresses
IDLE
) Specifications
DD
REVISION HISTORY
) Specifications
PD
) Specifications
Section 16.0 “12-bit
dsPIC30F2011/2012/3012/3013
Module”)
Revision F (May 2008)
This revision reflects these updates:
• Added FUSE Configuration Register (FICD)
• Added Note 2 to Device Configuration Registers
• Updated Bit 10 in the UART2 Register Map (see
• Electrical Specifications:
• Additional minor corrections throughout the
details (see
Registers”
table
Table
- Resolved TBD values for parameters DO10,
- 10-bit High-Speed ADC t
- Parameter OS65 (Internal RC Accuracy) has
- Parameter DC12 (RAM Data Retention
- Parameter D134 (Erase/Write Cycle Time)
- Removed parameters OS62 (Internal FRC
- Parameter OS63 (Internal FRC Accuracy)
- Updated Min and Max values and Conditions
document
DO16, DO20, and DO26 (see
parameter (time to stabilize) has been
updated from 20 µs typical to 20 µs maximum
(see
been expanded to reflect multiple Min and
Max values for different temperatures (see
Table
Voltage) has been updated to include a Min
value (see
has been updated to include Min and Max
values and the Typ value has been removed
(see
Jitter) and OS64 (Internal FRC Drift) and
Note 2 from AC Characteristics (see
Table
has been expanded to reflect multiple Min
and Max values for different temperatures
(see
for parameter SY11 and updated Min, Typ,
and Max values and Conditions for
parameter SY20 (see
(Table
15-2). This bit is unimplemented.
Table
Table
Table
20-19)
20-18)
Section 17.7 “Device Configuration
and
17-8)
20-37)
Table
20-12)
20-18)
Table
20-4)
17-8)
Table
PDU
20-21)
timing
Table
DS70139G-page 199
20-9)