DSPIC30F3012-20I/SO Microchip Technology, DSPIC30F3012-20I/SO Datasheet - Page 60

IC DSPIC MCU/DSP 24K 18SOIC

DSPIC30F3012-20I/SO

Manufacturer Part Number
DSPIC30F3012-20I/SO
Description
IC DSPIC MCU/DSP 24K 18SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3012-20I/SO

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
12
Flash Memory Size
24KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC30F005 - MODULE SCKT DSPIC30F 18DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F301220ISO

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F3012-20I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
DSPIC30F3012-20I/SO
0
dsPIC30F2011/2012/3012/3013
7.2
The use of the ADPCFG and TRIS registers control the
operation of the A/D port pins. The port pins that are
desired
corresponding TRIS bit set (input). If the TRIS bit is
cleared (output), the digital output level (V
converted.
When the PORT register is read, all pins configured as
analog input channels are read as cleared (a low level).
Pins configured as digital inputs will not convert an
analog input. Analog levels on any pin that is defined as
a digital input (including the ANx pins) may cause the
input buffer to consume the current that exceeds
device specifications.
DS70139G-page 60
Configuring Analog Port Pins
as
analog
inputs
must
OH
have
or V
OL
their
) is
7.2.1
One instruction cycle is required between a port
direction change or port write operation and a read
operation of the same port. Typically this instruction
would be a NOP.
EXAMPLE 7-1:
MOV #0xF0, W0
MOV W0, TRISB
NOP
btss PORTB, #7
I/O PORT WRITE/READ TIMING
; Configure PORTB<7:4>
; as inputs
; and PORTB<3:0> as outputs
; additional instruction
; bit test RB7 and skip if
PORT WRITE/READ
EXAMPLE
© 2010 Microchip Technology Inc.
cycle
set

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