PIC18F6410-I/PT Microchip Technology, PIC18F6410-I/PT Datasheet - Page 58

IC PIC MCU FLASH 8KX16 64TQFP

PIC18F6410-I/PT

Manufacturer Part Number
PIC18F6410-I/PT
Description
IC PIC MCU FLASH 8KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F6410-I/PT

Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
54
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI/I2C/EUSART/AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
54
Number Of Timers
4
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Quantity
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PIC18F6310/6410/8310/8410
5.4
PIC18F6310/6410/8310/8410 devices implement a
BOR circuit that provides the user with a number of
configuration and power-saving options. The BOR is
controlled by the BORV<1:0> and BOREN<1:0>
Configuration bits. There are a total of four BOR
configurations, which are summarized in
The BOR threshold is set by the BORV<1:0> bits. If BOR
is enabled (any values of BOREN<1:0> except ‘00’),
any drop of V
greater than T
A Reset may or may not occur if V
for less than T
Reset until V
If the Power-up Timer is enabled, it will be invoked after
V
Reset
(Parameter 33). If V
Power-up Timer is running, the chip will go back into a
Brown-out Reset and the Power-up Timer will be
initialized. Once V
Timer will execute the additional time delay.
BOR
independently configured. Enabling the Brown-out
Reset does not automatically enable the PWRT.
5.4.1
When BOREN<1:0> = 01, the BOR can be enabled or
disabled by the user in software. This is done with the
control bit, SBOREN (RCON<6>). Setting SBOREN
enables the BOR to function as previously described.
Clearing SBOREN disables the BOR entirely. The
SBOREN bit operates only in this mode; otherwise, it is
read as ‘0’.
TABLE 5-1:
DS39635C-page 58
DD
BOREN1
BOR Configuration
rises above V
0
0
1
1
and
for
Brown-out Reset (BOR)
SOFTWARE ENABLED BOR
DD
the
BOR
an
BOREN0
BOR
DD
rises above V
BOR CONFIGURATIONS
DD
0
1
0
1
(Parameter 35) will reset the device.
. The chip will remain in Brown-out
below V
additional
BOR
Power-up
DD
rises above V
; it then will keep the chip in
drops below V
(RCON<6>)
Unavailable
Unavailable
Unavailable
BOR
SBOREN
Available
Status of
BOR
time
Timer
(Parameter D005) for
.
DD
BOR
falls below V
delay,
, the Power-up
BOR
(PWRT)
Table
BOR is disabled; must be enabled by reprogramming the Configuration bits.
BOR is enabled in software; operation controlled by SBOREN.
BOR is enabled in hardware and active during the Run and Idle modes;
disabled during Sleep mode.
BOR is enabled in hardware; must be disabled by reprogramming the
Configuration bits.
while the
5-1.
T
PWRT
BOR
are
Placing the BOR under software control gives the user
the additional flexibility of tailoring the application to its
environment without having to reprogram the device to
change the BOR configuration. It also allows the user
to tailor device power consumption in software by
eliminating the incremental current that the BOR
consumes. While the BOR current is typically very
small, it may have some impact in low-power
applications.
5.4.2
When Brown-out Reset is enabled, the BOR bit always
resets to ‘0’ on any BOR or POR event. This makes it
difficult to determine if a Brown-out Reset event has
occurred just by reading the state of BOR alone. A
more reliable method is to simultaneously check the
state of both POR and BOR. This assumes that the
POR bit is reset to ‘1’ in software immediately after any
POR event. If BOR is ‘0’ while POR is ‘1’, it can be
reliably assumed that a BOR event has occurred.
5.4.3
When BOREN<1:0> = 10, the BOR remains under
hardware
described. Whenever the device enters Sleep mode,
however, the BOR is automatically disabled. When the
device returns to any other operating mode, BOR is
automatically re-enabled.
This mode allows for applications to recover from
brown-out situations, while actively executing code,
when the device requires BOR protection the most. At
the same time, it saves additional power in Sleep mode
by eliminating the small incremental BOR current.
Note:
BOR Operation
Even when BOR is under software con-
trol, the Brown-out Reset voltage level is
still set by the BORV<1:0> Configuration
bits. It cannot be changed in software.
DETECTING BOR
DISABLING BOR IN SLEEP MODE
control
and
 2010 Microchip Technology Inc.
operates
as
previously

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