DSPIC30F3010-30I/ML Microchip Technology, DSPIC30F3010-30I/ML Datasheet - Page 54

IC DSPIC MCU/DSP 24K 44QFN

DSPIC30F3010-30I/ML

Manufacturer Part Number
DSPIC30F3010-30I/ML
Description
IC DSPIC MCU/DSP 24K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3010-30I/ML

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Package
44QFN EP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit
Number Of Timers
5
For Use With
XLT44QFN4 - SOCKET TRANS ICE 28DIP TO 44QFNXLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F301030IML

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F3010-30I/ML
Manufacturer:
MICROCHI
Quantity:
20 000
dsPIC30F3010/3011
6.6.3
Example 6-2
can be used to load the 96 bytes of write latches.
32 TBLWTL and 32 TBLWTH instructions are needed to
load the write latches selected by the Table Pointer.
EXAMPLE 6-2:
6.6.4
For protection, the write initiate sequence for NVMKEY
must be used to allow any erase or program operation
to proceed. After the programming command has been
executed, the user must wait for the programming time
until programming is complete. The two instructions
following the start of the programming sequence
should be NOPs.
EXAMPLE 6-3:
DS70141F-page 54
; Set up a pointer to the first program memory location to be written
; program memory selected, and writes enabled
; Perform the TBLWT instructions to write the latches
; 0th_program_word
; 1st_program_word
;
; 31st_program_word
Note: In
2nd_program_word
Example
MOV
MOV
MOV
MOV
MOV
TBLWTL W2
TBLWTH W3
MOV
MOV
TBLWTL W2
TBLWTH W3
MOV
MOV
TBLWTL W2
TBLWTH W3
MOV
MOV
TBLWTL W2
TBLWTH W3
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
LOADING WRITE LATCHES
INITIATING THE PROGRAMMING
SEQUENCE
shows a sequence of instructions that
#0x0000,W0
W0
#0x6000,W0
#LOW_WORD_0,W2
#HIGH_BYTE_0,W3
#LOW_WORD_1,W2
#HIGH_BYTE_1,W3
#LOW_WORD_2,W2
#HIGH_BYTE_2,W3
#LOW_WORD_31,W2
#HIGH_BYTE_31,W3
#5
#0x55,W0
W0
#0xAA,W1
W1
NVMCON,#WR
6-2, the contents of the upper byte of W3 have no effect.
,
,
,
,
,
,
,
,
,
,
,
LOADING WRITE LATCHES
INITIATING A PROGRAMMING SEQUENCE
TBLPAG
[W0]
[W0++]
[W0]
[W0++]
NVMKEY
NVMKEY
[W0]
[W0++]
[W0]
[W0++]
; Block all interrupts with priority <7
; for next 5 instructions
; Write the 0x55 key
;
; Write the 0xAA key
; Start the erase sequence
; Insert two NOPs after the erase
; command is asserted
;
; Initialize PM Page Boundary SFR
; An example program memory address
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
© 2010 Microchip Technology Inc.

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