ATMEGA169P-16AU Atmel, ATMEGA169P-16AU Datasheet - Page 234

IC AVR MCU 16K 16MHZ IND 64-TQFP

ATMEGA169P-16AU

Manufacturer Part Number
ATMEGA169P-16AU
Description
IC AVR MCU 16K 16MHZ IND 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA169P-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI/USART/USI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRBFLY
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Package
64TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Quantity
Price
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Manufacturer:
Atmel
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23. LCD Controller
23.1
23.2
23.2.1
8018P–AVR–08/10
Features
Overview
Definitions
The LCD Controller/driver is intended for monochrome passive liquid crystal display (LCD) with
up to four common terminals and up to 25 segment terminals.
A simplified block diagram of the LCD Controller/Driver is shown in
the actual placement of I/O pins, see
on page
An LCD consists of several segments (pixels or complete symbols) which can be visible or non
visible. A segment has two electrodes with liquid crystal between them. When a voltage above a
threshold voltage is applied across the liquid crystal, the segment becomes visible.
The voltage must alternate to avoid an electrophoresis effect in the liquid crystal, which
degrades the display. Hence the waveform across a segment must not have a DC-component.
The PRLCD bit in
enable the LCD module.
Several terms are used when describing LCD. The definitions in
this document.
Table 23-1.
LCD
Segment
Common
Duty
Bias
Frame Rate
Display Capacity of 25 Segments and Four Common Terminals
Support Static, 1/2, 1/3 and 1/4 Duty
Support Static, 1/2, 1/3 Bias
On-chip LCD Power Supply, only One External Capacitor needed
Display Possible in Power-save Mode for Low Power Consumption
Software Selectable Low Power Waveform Capability
Flexible Selection of Frame Frequency
Software Selection between System Clock or an External Asynchronous Clock Source
Equal Source and Sink Capability to maximize LCD Life Time
LCD Interrupt Can be Used for Display Data Update or Wake-up from Sleep Mode
Segment and Common Pins not Needed for Driving the Display Can be Used as Ordinary I/O Pins
Latching of Display Data gives Full Freedom in Register Update
2.
Definitions
”PRR – Power Reduction Register” on page 45
A passive display panel with terminals leading directly to a segment
The least viewing element (pixel) which can be on or off
Denotes how many segments are connected to a segment terminal
1/(Number of common terminals on a actual LCD display)
1/(Number of voltage levels used driving a LCD display -1)
Number of times the LCD segments is energized per second.
”64A (TQFP) and 64M1 (QFN/MLF) Pinout ATmega169P”
Table 23-1
Figure 23-1 on page
must be written to zero to
ATmega169P
are used throughout
235. For
234

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