ATMEGA169P-16AU Atmel, ATMEGA169P-16AU Datasheet - Page 248

• Manufacturer Part Number: ATMEGA169P-16AU
• Description: IC AVR MCU 16K 16MHZ IND 64-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169P-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI/USART/USI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRBFLY
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 64TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

23.5.3
8018P–AVR–08/10
LCDFRR – LCD Frame Rate Register
Table 23-3.
• Bit 7 – Res: Reserved Bit
This bit is reserved and will always read as zero.
• Bits 6:4 – LCDPS2:0: LCD Prescaler Select
The LCDPS2:0 bits selects tap point from a prescaler. The prescaled output can be further
divided by setting the clock divide bits (LCDCD2:0). The different selections are shown in
23-4. Together they determine the prescaled LCD clock (clk
module.
Table 23-4.
Bit
(0xE6)
Read/Write
Initial Value
LCDPS2
LCDPM2
0
0
0
0
1
1
1
1
1
1
1
1
LCDPS1
LCD Port Mask (Continued)
LCD Prescaler Select
LCDPM1
R
7
–
0
0
0
1
1
0
0
1
1
0
0
1
1
LCDPS2
R/W
6
0
LCDPS0
0
1
0
1
0
1
0
1
LCDPM0
LCDPS1
0
1
0
1
R/W
5
0
Output from
clk
clk
clk
Prescaler
clk
clk
clk
clk
clk
clk
LCDPS0
LCD
LCD
LCD
LCD
LCD
LCD
I/O Port in Use as Segment
R/W
LCD
LCD
LCD
4
0
/1024
/2048
/4096
/128
/256
/512
/16
/64
/N
SEG0:20
SEG0:22
SEG0:23
SEG0:24
Driver
R
3
–
0
Applied Prescaled LCD Clock Frequency
when LCDCD2:0 = 0, Duty = 1/4, and
LCDCD2
LCD_PS
R/W
2
0
Frame Rate = 64Hz
), which is clocking the LCD
LCDCD1
R/W
ATmega169P
130 kHz
260 kHz
520 kHz
8.1 kHz
1
0
33 kHz
66 kHz
1 MHz
2 MHz
Maximum Number of
LCDCD0
Segments
R/W
0
0
21
23
24
25
LCDFRR
Table
248