PIC16F876-20/SO Microchip Technology, PIC16F876-20/SO Datasheet - Page 78

• Manufacturer Part Number: PIC16F876-20/SO
• Description: IC MCU FLASH 8KX14 EE 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F876-20/SO

• Program Memory Type: FLASH
• Program Memory Size: 14KB (8K x 14)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 368 B
• Interface Type: MSSP, PSP, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 5 Channel
• Package: 28SOIC W
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Data Rom Size: 256 B
• A/d Bit Size: 10 bit
• A/d Channels Available: 5
• Height: 2.31 mm
• Length: 17.87 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4 V
• Width: 7.49 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC16F87X
FIGURE 9-7:
9.2.2
The addressing procedure for the I
the first byte after the START condition usually deter-
mines which device will be the slave addressed by the
master. The exception is the general call address, which
can address all devices. When this address is used, all
devices should, in theory, respond with an acknowledge.
The general call address is one of eight addresses
reserved for specific purposes by the I
consists of all 0’s with R/W = 0.
The general call address is recognized when the Gen-
eral Call Enable bit (GCEN) is enabled (SSPCON2<7>
is set). Following a START bit detect, 8 bits are shifted
into SSPSR and the address is compared against
SSPADD. It is also compared to the general call
address and fixed in hardware.
FIGURE 9-8:
DS30292C-page 76
SDA
SCL
SSPIF
BF (SSPSTAT<0>)
CKP (SSPCON<4>)
GCEN
(SSPCON2<7>)
SSPOV
(SSPCON<6>)
SDA
SCL
SSPIF
BF
(SSPSTAT<0>)
S
GENERAL CALL ADDRESS
SUPPORT
A7
1
Data in
sampled
S
A6
2
I
SLAVE MODE GENERAL CALL ADDRESS SEQUENCE (7 OR 10-BIT MODE)
2
C WAVEFORMS FOR TRANSMISSION (7-BIT ADDRESS)
A5
Receiving Address
3
1
A4
4
2
General Call Address
A3
2
5
C bus is such that
3
A2
6
2
C protocol. It
4
A1
7
5
R/W = 1
8
6
9
ACK
responds to SSPIF
7
SCL held low
while CPU
R/W = 0
8
If the general call address matches, the SSPSR is
transferred to the SSPBUF, the BF flag is set (eighth
bit), and on the falling edge of the ninth bit (ACK bit),
the SSPIF flag is set.
When the interrupt is serviced, the source for the inter-
rupt can be checked by reading the contents of the
SSPBUF to determine if the address was device spe-
cific, or a general call address.
In 10-bit mode, the SSPADD is required to be updated
for the second half of the address to match, and the UA
bit is set (SSPSTAT<1>). If the general call address is
sampled when GCEN is set, while the slave is config-
ured in 10-bit address mode, then the second half of
the address is not necessary, the UA bit will not be set,
and the slave will begin receiving data after the
Acknowledge (Figure 9-8).
ACK
Address is compared to General Call Address
after ACK, set interrupt flag
9
D7
D7
1
1
SSPBUF is written in software
D6
D6
Cleared in software
2
2
Cleared in software
SSPBUF is read
Set bit after writing to SSPBUF
(the SSPBUF must be written to,
before the CKP bit can be set)
D5
3
Receiving data
D5
3
D4
4
D4
4
Transmitting Data
D3
5
D3
5
2001 Microchip Technology Inc.
D2
6
D2
6
From SSP Interrupt
Service Routine
D1
7
D1
7
D0
8
D0
8
Not ACK
R/W = 0
9
ACK
9
’0’
’1’
P