PIC16F876-20/SO Microchip Technology, PIC16F876-20/SO Datasheet - Page 89

IC MCU FLASH 8KX14 EE 28SOIC

PIC16F876-20/SO

Manufacturer Part Number
PIC16F876-20/SO
Description
IC MCU FLASH 8KX14 EE 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F876-20/SO

Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
MSSP, PSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 5 Channel
Package
28SOIC W
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Data Rom Size
256 B
A/d Bit Size
10 bit
A/d Channels Available
5
Height
2.31 mm
Length
17.87 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F876-20/SO
Manufacturer:
MCI
Quantity:
56
Part Number:
PIC16F876-20/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
9.2.14
A STOP bit is asserted on the SDA pin at the end of a
receive/transmit by setting the Stop Sequence Enable
bit, PEN (SSPCON2<2>). At the end of a receive/
transmit, the SCL line is held low after the falling edge
of the ninth clock. When the PEN bit is set, the master
will assert the SDA line low. When the SDA line is sam-
pled low, the baud rate generator is reloaded and
counts down to 0. When the baud rate generator times
out, the SCL pin will be brought high, and one T
(baud rate generator rollover count) later, the SDA pin
will be de-asserted. When the SDA pin is sampled high
FIGURE 9-17:
2001 Microchip Technology Inc.
STOP CONDITION TIMING
SCL
SDA
Note: T
Write to SSPCON2
Falling edge of
9th clock
BRG
STOP CONDITION RECEIVE OR TRANSMIT MODE
ACK
= one baud rate generator period.
Set PEN
SDA asserted low before rising edge of clock
to setup STOP condition
T
T
BRG
BRG
BRG
T
SCL brought high after T
BRG
SCL = 1 for T
after SDA sampled high. P bit (SSPSTAT<4>) is set.
P
T
BRG
while SCL is high, the P bit (SSPSTAT<4>) is set. A
T
set (Figure 9-17).
Whenever the firmware decides to take control of the
bus, it will first determine if the bus is busy by checking
the S and P bits in the SSPSTAT register. If the bus is
busy, then the CPU can be interrupted (notified) when
a STOP bit is detected (i.e., bus is free).
9.2.14.1
If the user writes the SSPBUF when a STOP sequence
is in progress, then WCOL is set and the contents of the
buffer are unchanged (the write doesn’t occur).
BRG
BRG
PEN bit (SSPCON2<2>) is cleared by
later, the PEN bit is cleared and the SSPIF bit is
hardware and the SSPIF bit is set
, followed by SDA = 1 for T
BRG
WCOL Status Flag
PIC16F87X
BRG
DS30292C-page 87

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