PIC16F876-20/SO Microchip Technology, PIC16F876-20/SO Datasheet - Page 90

IC MCU FLASH 8KX14 EE 28SOIC

PIC16F876-20/SO

Manufacturer Part Number
PIC16F876-20/SO
Description
IC MCU FLASH 8KX14 EE 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F876-20/SO

Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
MSSP, PSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 5 Channel
Package
28SOIC W
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Data Rom Size
256 B
A/d Bit Size
10 bit
A/d Channels Available
5
Height
2.31 mm
Length
17.87 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F876-20/SO
Manufacturer:
MCI
Quantity:
56
Part Number:
PIC16F876-20/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F87X
9.2.15
Clock arbitration occurs when the master, during any
receive, transmit, or Repeated START/STOP condi-
tion, de-asserts the SCL pin (SCL allowed to float high).
When the SCL pin is allowed to float high, the baud rate
generator (BRG) is suspended from counting until the
SCL pin is actually sampled high. When the SCL pin is
sampled high, the baud rate generator is reloaded with
the contents of SSPADD<6:0> and begins counting.
This ensures that the SCL high time will always be at
least one BRG rollover count in the event that the clock
is held low by an external device (Figure 9-18).
FIGURE 9-18:
DS30292C-page 88
BRG overflow,
Release SCL,
If SCL = 1, Load BRG with
SSPADD<6:0>, and start count
to measure high time interval
SCL
SDA
CLOCK ARBITRATION
CLOCK ARBITRATION TIMING IN MASTER TRANSMIT MODE
T
BRG
BRG overflow occurs,
Release SCL, Slave device holds SCL low
T
BRG
SCL line sampled once every machine cycle (T
Hold off BRG until SCL is sampled high.
9.2.16
While in SLEEP mode, the I
addresses or data, and when an address match or
complete byte transfer occurs, wake the processor
from SLEEP (if the SSP interrupt is enabled).
9.2.17
A RESET disables the SSP module and terminates the
current transfer.
SLEEP OPERATION
EFFECTS OF A RESET
T
BRG
SCL = 1, BRG starts counting
clock high interval
2001 Microchip Technology Inc.
2
C module can receive
OSC
4).

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