AT32AP7001-ALUT Atmel, AT32AP7001-ALUT Datasheet - Page 29

• Manufacturer Part Number: AT32AP7001-ALUT
• Description: IC MCU 32BIT AVR32 208-LQFP
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7001-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, POR, PWM, WDT
• Number Of I /o: 90
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: EBI, ISI, MCI, PS2, SPI, TWI, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 90
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 1 Channel
• Package: 208PQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

8.6
8.6.1
32015G–AVR32–09/09
Output Pixel Inserter
Planar Insertion Mode
The following expression represents what is computed by the VMUs in Vertical Filter Mode:
The Output Pixel Inserter uses the OIM (Output Insertion Mode) field in the CONFIG register and
the destination pixel address given in the PICO operation instructions to decide which three of
the twelve possible OUTn pixels to write back the scaled and saturated results from the VMUs
to. The 22-bit results from each VMU is first scaled by performing an arithmetical right shift by
COEFF_FRAC_BITS in order to remove the fractional part of the results and obtain the integer
part. The integer part is then saturated to an unsigned 8-bit number in the range 0 to 255.
In Planar Insertion Mode the destination pixel address OUTd specifies which pixel in each of the
registers OUTPIX0, OUTPIX1 and OUTPIX2 will be updated. VMUn writes to OUTPIXn. This
can be seen in
transforming from one color space to another where the resulting color components should be
stored in separate images.
Figure 8-5.
VMU0_OUT
VMU1_OUT
VMU2_OUT
Planar Pixel Insertion
Figure 8-5 on page 29
=
=
=
COEFF0_0 COEFF0_1 COEFF0_2
COEFF1_0 COEFF1_1 COEFF1_2
COEFF2_0 COEFF2_1 COEFF2_2
OUTPIX0
OUTPIX1
OUTPIX2
= VMU0
= VMU1
= VMU2
OUT0
OUT4
OUT8
d = 0
and
OUT1
OUT5
OUT9
Table 8-2 on page
d = 1
IN((x+0)%11)
IN((x+4)%11)
IN((x+8)%11)
IN((y+0)%11)
IN((y+4)%11)
IN((y+8)%11)
IN((z+0)%11)
IN((z+4)%11)
IN((z+8)%11)
OUT10
OUT2
OUT6
d = 2
47. This mode is useful when
OUT11
OUT3
OUT7
+
+
+
d = 3
(
(
(
OFFSET0 or VMU0_OUT
OFFSET1 or VMU1_OUT
OFFSET2 or VMU2_OUT
AT32AP7001
)
)
)
29