DSPIC30F6012A-30I/PT Microchip Technology, DSPIC30F6012A-30I/PT Datasheet - Page 41
DSPIC30F6012A-30I/PT
Manufacturer Part Number
DSPIC30F6012A-30I/PT
Description
IC DSPIC MCU/DSP 144K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F6011A-30IPT.pdf
(234 pages)
3.DSPIC30F6011A-30IPT.pdf
(8 pages)
4.DSPIC30F6011A-30IPT.pdf
(10 pages)
5.DSPIC30F6011A-30IPT.pdf
(6 pages)
6.DSPIC30F6011A-30IPT.pdf
(8 pages)
7.DSPIC30F6011A-30IPT.pdf
(16 pages)
8.DSPIC30F6014A-20EPT.pdf
(238 pages)
Specifications of DSPIC30F6012A-30I/PT
Program Memory Type
FLASH
Program Memory Size
144KB (48K x 24)
Package / Case
64-TFQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
Number Of I /o
52
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
52
Data Ram Size
8 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F6012A30IP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6012A-30I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F6012A-30I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
TABLE 11-5:
© 2010 Microchip Technology Inc.
Step 6: Update the row address stored in NVMADRU:NVMADR. When W6 rolls over to 0x0, NVMADRU must be
0000
0000
0000
0000
Step 7: Reset device internal PC.
0000
0000
Step 8: Repeat Steps 3-7 until all rows of code memory are erased.
Step 9: Initialize NVMADR and NVMADRU to erase executive memory and initialize W7 for row address updates.
0000
0000
0000
0000
0000
Step 10: Set NVMCON to erase 1 row of executive memory.
0000
0000
Step 11: Unlock the NVMCON to erase 1 row of executive memory.
0000
0000
0000
0000
Step 12: Initiate the erase cycle.
0000
0000
0000
—
0000
0000
0000
0000
0000
Step 13: Update the row address stored in NVMADR.
0000
0000
Step 14: Reset device internal PC.
0000
0000
Step 15: Repeat Steps 10-14 until all 24 rows of executive memory are erased.
Step 16: Initialize NVMADR and NVMADRU to erase data memory and initialize W7 for row address updates.
0000
0000
0000
0000
0000
Step 17: Set NVMCON to erase 1 row of data memory.
0000
0000
Command
(Binary)
incremented.
430307
AF0042
EC2764
883B16
040100
000000
EB0300
883B16
200807
883B27
200407
24071A
883B0A
200558
883B38
200AA9
883B39
A8E761
000000
000000
—
000000
000000
A9E761
000000
000000
430307
883B16
040100
000000
2XXXX6
883B16
2007F6
883B16
200207
24075A
883B0A
(Hexadecimal)
SERIAL INSTRUCTION EXECUTION FOR ERASING PROGRAM MEMORY
(EITHER IN LOW-VOLTAGE OR NORMAL-VOLTAGE SYSTEMS) (CONTINUED)
Data
ADD
BTSC
INC
MOV
GOTO 0x100
NOP
CLR
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
BSET NVMCON, #WR
NOP
NOP
Externally time ‘P13a’ ms (see
Timing
NOP
NOP
BCLR NVMCON, #WR
NOP
NOP
ADD
MOV
GOTO 0x100
NOP
MOV
MOV
MOV
MOV
MOV
MOV
MOV
Requirements”)
W6, W7, W6
SR, #C
NVMADRU
W6, NVMADR
W6
W6, NVMADR
#0x80, W7
W7, NVMADRU
#0x40, W7
#0x4071, W10
W10, NVMCON
#0x55, W8
W8, NVMKEY
#0xAA, W9
W9, NVMKEY
W6, W7, W6
W6, NVMADR
#<lower 16-bits of starting Data EEPROM address>, W6
W6, NVMADR
#0x7F, W6
W6, NVMADRU
#0x20, W7
#0x4075, W10
W10, NVMCON
Description
Section 13.0 “AC/DC Characteristics and
DS70102K-page 41