P87C51SBAA,512 NXP Semiconductors, P87C51SBAA,512 Datasheet - Page 34

• Manufacturer Part Number: P87C51SBAA,512
• Description: IC 80C51 MCU 4K OTP 44-PLCC
• Manufacturer: NXP Semiconductors
• Series: 87Cr

Specifications of P87C51SBAA,512

• Program Memory Type: OTP
• Program Memory Size: 4KB (4K x 8)
• Package / Case: 44-PLCC
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR
• Number Of I /o: 32
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Processor Series: P87C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Cpu Family: 87C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 16MHz
• Total Internal Ram Size: 128Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM10064 - EMULATOR 80C51 PDS51-MK2
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-1246-5; 935260182512; P87C51SBAA

Philips Semiconductors
80C51 ROM CODE SUBMISSION
When submitting ROM code for the 80C51, the following must be specified:
1. 4k byte user ROM data
2. 64 byte ROM encryption key
3. ROM security bits.
Security Bit 1: When programmed, this bit has two effects on masked ROM parts:
1. External MOVC is disabled, and
2. EA is latched on Reset.
Security Bit 2: When programmed, this bit inhibits Verify User ROM.
NOTE: Security Bit 2 cannot be enabled unless Security Bit 1 is enabled.
If the ROM Code file does not include the options, the following information must be included with the ROM code.
For each of the following, check the appropriate box, and send to Philips along with the code:
80C52 ROM CODE SUBMISSION
When submitting ROM code for the 80C52, the following must be specified:
1. 8k byte user ROM data
2. 64 byte ROM encryption key
3. ROM security bits.
Security Bit 1: When programmed, this bit has two effects on masked ROM parts:
1. External MOVC is disabled, and
2. EA is latched on Reset.
Security Bit 2: When programmed, this bit inhibits Verify User ROM.
NOTE: Security Bit 2 cannot be enabled unless Security Bit 1 is enabled.
If the ROM Code file does not include the options, the following information must be included with the ROM code.
For each of the following, check the appropriate box, and send to Philips along with the code:
2000 Aug 07
80C51 8-bit microcontroller family
4 K/8 K OTP/ROM low voltage (2.7 V–5.5 V),
low power, high speed (33 MHz), 128/256 B RAM
ADDRESS
0000H to 0FFFH
1000H to 103FH
1040H
1040H
ADDRESS
0000H to 1FFFH
2000H to 203FH
2040H
2040H
Security Bit #1:
Security Bit #2:
Encryption:
Security Bit #1:
Security Bit #2:
Encryption:
Enabled
Enabled
No
Enabled
Enabled
No
CONTENT
DATA
KEY
SEC
SEC
CONTENT
DATA
KEY
SEC
SEC
Disabled
Disabled
Yes
Disabled
Disabled
Yes
If Yes, must send key file.
If Yes, must send key file.
34
BIT(S)
7:0
7:0
0
1
BIT(S)
7:0
7:0
0
1
80C51/87C51/80C52/87C52
COMMENT
User ROM Data
ROM Encryption Key
ROM Security Bit 1
ROM Security Bit 2
COMMENT
User ROM Data
ROM Encryption Key
ROM Security Bit 1
ROM Security Bit 2
Product specification