P87LPC762FD,512 NXP Semiconductors, P87LPC762FD,512 Datasheet - Page 11

• Manufacturer Part Number: P87LPC762FD,512
• Description: IC 80C51 MCU 2K OTP 20-SOIC
• Manufacturer: NXP Semiconductors
• Series: LPC700r

Specifications of P87LPC762FD,512

• Program Memory Type: OTP
• Program Memory Size: 2KB (2K x 8)
• Package / Case: 20-SOIC (7.5mm Width)
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, WDT
• Number Of I /o: 18
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P87LPC7x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C/UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 45 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: OM10063 - PROGRAMMER LPC700 P76XLCPOM10050 - EMULATOR LPC700 PDS76X
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-3212-5; 935266853512; P87LPC762FD

* SFRs are bit addressable.
# SFRs are modified from or added to the 80C51 SFRs.
1. Unimplemented bits in SFRs are X (unknown) at all times. Ones should not be written to these bits since they may be used for other
2. I/O port values at reset are determined by the PRHI bit in the UCFG1 configuration byte.
3. The PCON reset value is x x BOF POF–0 0 0 0b. The BOF and POF flags are not affected by reset. The POF flag is set by hardware upon
4. The WDCON reset value is xx11 0000b for a Watchdog reset, xx01 0000b for all other reset causes if the watchdog is enabled, and xx00
Philips Semiconductors
NOTES:
2001 Oct 26
TL1
TMOD
WDCON#
WDRST#
Low power, low price, low pin count (20 pin)
microcontroller with 2 kbyte OTP
purposes in future derivatives. The reset value shown in the table for these bits is 0.
power up. The BOF flag is set by the occurrence of a brownout reset/interrupt and upon power up.
0000b for all other reset causes if the watchdog is disabled.
Name
Timer 1 low byte
Timer 0 and 1 mode
Watchdog control register
Watchdog reset register
Description
Address
SFR
8Bh
A7h
A6h
89h
GATE
–
MSB
C/T
–
8
WDOVF
M1
Bit Functions and Addresses
WDRUN
M0
WDCLK
GATE
WDS2
C/T
WDS1
M1
87LPC762
LSB
WDS0
Preliminary data
M0
Reset
Value
Note 4
00h
00h
xxh