Z8F6422VS020SG Zilog, Z8F6422VS020SG Datasheet - Page 212

• Manufacturer Part Number: Z8F6422VS020SG
• Description: IC ENCORE MCU FLASH 64K 68PLCC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F6422VS020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-LCC (J-Lead)
• Processor Series: Z8F642x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z8F64200100KITG, Z8F64230100ZDF, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZACG, Z8F64210100ZDA, Z8F64210100ZDP, Z8F64210100ZDV, Z8F64220100ZDA, Z8F64220100ZDV, Z8F6422AR00ZEM, Z8F6422VS00ZEM, Z8F6421AN00ZEM
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4678 - KIT DEV FOR Z8F642 MCU 44 PIN269-4677 - KIT DEV FOR Z8F642 MCU 28PIN269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN269-4540 - KIT DEV FOR Z8 ENCORE 16K TO 64K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4285; Z8F6422VS020SG

PS019921-0308
OCD Auto-Baud Detector/Generator
OCD Serial Errors
To run over a range of baud rates (bits per second) with various system clock frequencies,
the On-Chip Debugger has an Auto-Baud Detector/Generator. After a reset, the OCD is
idle until it receives data. The OCD requires that the first character sent from the host is
the character
data bits). The Auto-Baud Detector measures this period and sets the OCD Baud Rate
Generator accordingly.
The Auto-Baud Detector/Generator is clocked by the system clock. The minimum baud
rate is the system clock frequency divided by 512. For optimal operation, the maximum
recommended baud rate is the system clock frequency divided by 8. The theoretical maxi-
mum baud rate is the system clock frequency divided by 4. This theoretical maximum is
possible for low noise designs with clean signals.
mended maximum baud rates for sample crystal frequencies.
Table 100. OCD Baud-Rate Limits
If the OCD receives a Serial Break (nine or more continuous bits Low) the Auto-Baud
Detector/Generator resets. The Auto-Baud Detector/Generator can then be reconfigured
by sending
The On-Chip Debugger can detect any of the following error conditions on the DBG pin:
•
•
•
When the OCD detects one of these errors, it aborts any command currently in progress,
transmits a Serial Break 4096 system clock cycles long back to the host, and resets the
Auto-Baud Detector/Generator. A Framing Error or Transmit Collision may be caused by
the host sending a Serial Break to the OCD. Because of the open-drain nature of the
interface, returning a Serial Break break back to the host only extends the length of the
Serial Break if the host releases the Serial Break early.
System Clock
Frequency (MHz)
20.0
1.0
0.032768 (32 kHz)
Serial Break (a minimum of nine continuous bits Low).
Framing Error (received Stop bit is Low).
Transmit Collision (OCD and host simultaneous transmission detected by the OCD).
80H
80H
.
. The character
Recommended Maximum Baud
Rate (kbits/s)
2500
125.0
4.096
80H
has eight continuous bits Low (one Start bit plus 7
Table 100
Z8 Encore! XP
lists minimum and recom-
Product Specification
Minimum Baud Rate
(kbits/s)
39.1
1.96
0.064
®
On-Chip Debugger
F64XX Series
198