Z8F6422VS020SG Zilog, Z8F6422VS020SG Datasheet - Page 64

• Manufacturer Part Number: Z8F6422VS020SG
• Description: IC ENCORE MCU FLASH 64K 68PLCC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F6422VS020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-LCC (J-Lead)
• Processor Series: Z8F642x
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 46
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z8F64200100KITG, Z8F64230100ZDF, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZACG, Z8F64210100ZDA, Z8F64210100ZDP, Z8F64210100ZDV, Z8F64220100ZDA, Z8F64220100ZDV, Z8F6422AR00ZEM, Z8F6422VS00ZEM, Z8F6421AN00ZEM
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4678 - KIT DEV FOR Z8F642 MCU 44 PIN269-4677 - KIT DEV FOR Z8F642 MCU 28PIN269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN269-4540 - KIT DEV FOR Z8 ENCORE 16K TO 64K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4285; Z8F6422VS020SG

Table 10. Stop Mode Recovery Sources and Resulting Action
PS019921-0308
Operating Mode
STOP mode
Stop Mode Recovery Using Watchdog Timer Time-Out
Stop Mode Recovery Using a GPIO Port Pin Transition HALT
Caution:
If the Watchdog Timer times out during STOP mode, the device undergoes a Stop Mode
Recovery sequence. In the Watchdog Timer Control register, the WDT and STOP bits are
set to 1. If the Watchdog Timer is configured to generate an interrupt upon time-out and
the Z8 Encore! XP F64XX Series devices are configured to respond to interrupts, the eZ8
CPU services the Watchdog Timer interrupt request following the normal Stop Mode
Recovery sequence.
Each of the GPIO Port pins may be configured as a Stop Mode Recovery input source. On
any GPIO pin enabled as a Stop Mode Recovery source, a change in the input pin value
(from High to Low or from Low to High) initiates Stop Mode Recovery. The GPIO Stop
Mode Recovery signals are filtered to reject pulses less than 10 ns (typical) in duration. In
the Watchdog Timer Control register, the STOP bit is set to 1.
Port Input Data registers record the Port transition only if the signal stays on
the Port pin through the end of the Stop Mode Recovery delay. Thus, short puls-
es on the Port pin can initiate Stop Mode Recovery without being written to the
Port Input Data register or without initiating an interrupt (if enabled for that
pin).
In STOP mode, the GPIO Port Input Data registers (PxIN) are disabled. The
Stop Mode Recovery Source
Watchdog Timer time-out
when configured for Reset
Watchdog Timer time-out
when configured for interrupt
Data transition on any GPIO Port pin
enabled as a Stop Mode Recovery
source
Action
Stop Mode Recovery
Stop Mode Recovery followed by interrupt
(if interrupts are enabled)
Stop Mode Recovery
Z8 Encore! XP
Reset and Stop Mode Recovery
Product Specification
®
F64XX Series
50