Z16F6411FI20SG Zilog, Z16F6411FI20SG Datasheet - Page 89

• Manufacturer Part Number: Z16F6411FI20SG
• Description: IC ZNEO MCU FLASH 64K 80QFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F6411FI20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-BQFP
• Processor Series: Z16F6x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4571

Table 27. Port A-K Data Direction Registers (PxDD)
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
Port A-K Data Direction Registers
FF_E102, FF_E112, FF_E122, FF_E132, FF_E142, FF_E152, FF_E162, FF_E172, FF_E182,
DD7
R/W
7
1
POUT[7:0]—Port Output Data
These bits contain the data to be driven out from the port pins. The values are only driven if
the corresponding pin is configured as an output and the pin is not configured for alternate
function operation.
0 = Drive a logical 0 (Low).
1= Drive a logical 1 (High). High value is not driven if the drain has been disabled by setting
the corresponding port output control register bit to 1.
The Port A-K data direction registers (see
either inputs or outputs.
DD[7:0]—Data Direction
These bits control the direction of the associated port pin. Port alternate function operation
overrides the data direction register setting. 
0 = Output
Data in the Port A-K output data register is driven onto the port pin.
1 = Input
The port pin is sampled and the value written into the Port A-K input data register. The
output driver is high impedance.
DD6
R/W
6
1
DD5
R/W
5
1
P R E L I M I N A R Y
DD4
R/W
4
1
FF_E192
Table
DD3
R/W
3
27) configure the specified port pins as
1
DD2
R/W
2
1
General-Purpose Input/Output
Product Specification
ZNEO
DD1
R/W
1
1
Z16F Series
DD0
R/W
0
1
74