C8051F313-GM Silicon Laboratories Inc, C8051F313-GM Datasheet - Page 136

IC 8051 MCU 8K FLASH 28MLP

C8051F313-GM

Manufacturer Part Number
C8051F313-GM
Description
IC 8051 MCU 8K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F31xr
Datasheets

Specifications of C8051F313-GM

Core Size
8-Bit
Program Memory Size
8KB (8K x 8)
Oscillator Type
Internal
Core Processor
8051
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
No. Of I/o's
25
Ram Memory Size
1280Byte
Cpu Speed
25MHz
No. Of Timers
4
No. Of Pwm Channels
5
Digital Ic Case
RoHS Compliant
Rohs Compliant
Yes
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
25
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F310DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Data Rom Size
128 B
Height
0.88 mm
Length
5 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
5 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
336-1256
C8051F310/1/2/3/4/5/6/7
136
Bits7–0: P0.[7:0]
Bits7–0: Analog Input Configuration Bits for P0.7–P0.0 (respectively).
P0.7
R/W
R/W
Bit7
Bit7
Write - Output appears on I/O pins per Crossbar Registers.
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P0MDOUT.n bit = 0).
Read - Always reads ‘1’ if selected as analog input in register P0MDIN. Directly reads Port
pin when configured as digital input.
0: P0.n pin is logic low.
1: P0.n pin is logic high.
Port pins configured as analog inputs have their weak pullup, digital driver, and digital
receiver disabled.
0: Corresponding P0.n pin is configured as an analog input.
1: Corresponding P0.n pin is not configured as an analog input.
P0.6
R/W
R/W
Bit6
Bit6
SFR Definition 13.4. P0MDIN: Port0 Input Mode
P0.5
R/W
R/W
Bit5
Bit5
SFR Definition 13.3. P0: Port0
P0.4
R/W
R/W
Bit4
Bit4
Rev. 1.7
P0.3
R/W
R/W
Bit3
Bit3
P0.2
R/W
R/W
Bit2
Bit2
P0.1
R/W
R/W
Bit1
Bit1
(bit addressable)
P0.0
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
Reset Value
Reset Value
11111111
11111111
0x80
0xF1

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