M30260F6AGP#U5A Renesas Electronics America, M30260F6AGP#U5A Datasheet - Page 138

IC M16C MCU FLASH 48K 48LQFP

M30260F6AGP#U5A

Manufacturer Part Number
M30260F6AGP#U5A
Description
IC M16C MCU FLASH 48K 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheet

Specifications of M30260F6AGP#U5A

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
UART
Total Internal Ram Size
2KB
# I/os (max)
39
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Package
48LQFP
Family Name
R8C
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
39
Number Of Timers
8
For Use With
R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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R
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M
e
E
1
. v
J
6
Figure 12.3.2. INVC0 Register
0
C
2
9
0 .
B
2 /
0
0
6
2
A
0
F
2
e
G
0 -
b
Three-phase PWM control register 0 (1)
b7 b6 b5 b4 b3 b2 b1 b0
NOTES:
o r
1 .
Transfer trigger: Timer B2 underflow, write to the INV07 bit or write to the TB2 register when INV10 is “1”
Timing at which transferred from IDB0 to
IDB1 registers to three-phase output shift
register
Timing at which dead time timer trigger is
generated when INV16 bit is “0”
INV13 bit
2
Mode
0
, 5
u
1. Write to this register after setting the PRC1 bit in the PRCR register to “1” (write enable). Note also that INV00 to INV02,
2. If this bit needs to be set to “1”, set any value in the ICTB2 register before writing to it.
3. Effective when the INV11 bit is set to “1” (three-phase mode 1). If INV11 is set to “0” (three-phase mode 0), the ICTB2
4. Setting the INV02 bit to “1” activates the dead time timer, U/V/W-phase output control circuits and ICTB2 counter.
5. When the INV02 bit is set to “1”(theee-phase control timer functions) and the INV03 is set to "0"(three-phase motor control
6. The INV03 bit is set to “0” in the following cases:
7. Can only be set by writing “0” in a program, and cannot be set to “1”.
8. The effects of the INV06 bit are described in the table below.
9. If the INV06 bit is “1”, set the INV11 bit to “0” (three-phase mode 0) and set the PWCON bit to “0” (timer B2 reloaded by a
10. Individual pins can be disabled using PFCR register.
0
p
INV04 and INV06 bits can only be rewritten when timers A1, A2, A4 and B2 are idle.
counter is incremented by “1” each time the timer B2 underflows, regardless of whether the INV00 and INV01 bits are set.
When setting the INV01 bit to “1”, set the timer A1 count start flag before the first timer B2 underflow.When the INV00 bit is
set to “1”, the first interrupt is generated when the timer B2 underflows n-1 times, if n is the value set in the ICTB2 counter.
Subsequent interrupts are generated every n times the timer B2 underflow.
timer output disabled), U, U, V, V, W and W pins, including pins shared with other output functions, enter a high-impedance
state.
• When reset
• When positive and negative go active (INV05="1") simultaneously while INV04 bit is set to “1”
• When set to “0” in a program
• When input on the SD pin changes state from “H” to “L” (The INV03 bit cannot be set to “1” when SD input is “L”.) When
timer B2 underflow).
2
both the INV04 and the INV05 bits are set to “1”, the INV03 bit is set to “0”.
(
0
M
0
7
1
6
C
page 119
2 /
6
, A
Item
M
1
Bit symbol
f o
6
INV00
INV01
INV02
INV03
INV04
INV05
INV06
INV07
C
3
Symbol
INVC0
2
2 /
9
6
, B
M
Positive and negative
phases concurrent output
disable bit
Positive and negative
phases concurrent output
detect flag
Effective interrupt output
specification bit
Effective interrupt output
polarity select bit
Mode select bit
Output control bit
Modulation mode select
bit
Software trigger select bit
1
6
Transferred only once synchronously
with the transfer trigger after writing to
the IDB0 to IDB1 registers
Synchronous with the falling edge of
timer A1, A2, or A4 one-shot pulse
Triangular wave modulation mode
Effective when INV11 is “1” and INV06
is “0”
C
2 /
Bit name
6
(2, 3)
Address
) T
0348
INV06=0
(3)
16
(4)
(6)
(8)
After reset
0: The ICTB2 counter is incremented by
1: The ICTB2 counter is incremented by
0: ICTB2 counter incremented by 1 at a
1: Selected by INV00 bit
0: Three-phase motor control timer
1: Three-phase motor control timer
0: Three-phase motor control timer output
1: Three-phase motor control timer output
0: Simultaneous active output enabled
1: Simultaneous active output disabled
0: Not detected yet
1: Already detected
0: Triangular wave modulation mode
1: Sawtooth wave modulation mode
Setting this bit to “1” generates a transfer
trigger. If the INV06 bit is “1”, a trigger for
the dead time timer is also generated.
The value of this bit when read is “0”.
n
00
timer B2 underflow
one on the rising edge of the timer A1
reload control signal
one on the falling edge of the timer A1
reload control signal
function unused
function
disabled
enabled
16
Description
Transferred every transfer trigger
Synchronous with the transfer
trigger and the falling edge of timer
A1, A2, or A4 one-shot pulse
Sawtooth wave modulation mode
Has no effect
INV06=1
(10)
(5)
(5)
(7)
(9)
RW
RW
RW
RW
RW
RW
RW
RW
RW
12. Timer

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