M30260F6AGP#U5A Renesas Electronics America, M30260F6AGP#U5A Datasheet - Page 202

• Manufacturer Part Number: M30260F6AGP#U5A
• Description: IC M16C MCU FLASH 48K 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30260F6AGP#U5A

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 39
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: UART
• Total Internal Ram Size: 2KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: R8C
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 39
• Number Of Timers: 8
• For Use With: R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

R
R
M
e
E
1
. v
J
6
Figure 14.3 ADTRGCON Register
Table 14.2 A/D Conversion Frequency Select
NOTE:
0
C
2
9
CKS2
0 .
2 /
B
1
0
0
0
0
1
1
1
0
0
6
2
A
0
1. Set the AD frequency to 10 MHz or less (12 MHz or less in M16C/26B). The AD is selected with
F
2
e
G
0 -
b
A/D trigger control register
combinations of the CKS0 bit in the ADCON0 register, CKS1 bit in the ADCON1 register, and the
CKS2 bit in the ADCON2 register.
b7
NOTES:
o r
1 .
CKS1
2
0
b6
u
, 5
1. If the ADTRGCON register is rewritten during A/D conversion, the conversion result will be indeterminate.
2. Set “00
0
0
1
1
0
0
1
1
0
p
mode 1.
b5
2
(
0
M
0
b4
7
1
CKS0
16
6
b3
” in this register in one-shot mode, repeat mode, single sweep mode, repeat sweep mode 0 and repeat sweep
C
0
1
0
1
0
1
0
1
page 183
b2
2 /
6
b1
, A
b0
Divided-by-4 of f
Divided-by-2 of f
f
Divided-by-12 of f
Divided-by-6 of f
Divided-by-3 of f
M
AD
Bit symbol
1
HPTRG0
HPTRG1
f o
(b7-b4)
6
DTE
SSE
C
3
ADTRGCON
Symbol
(1,2)
2
2 /
9
6
, B
A/D Operation Mode
Select Bit 2
A/D Operation Mode
Select Bit 3
AN1 Trigger Select Bit
AN0 Trigger Select Bit
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
M
Ø
1
AD
AD
AD
AD
6
AD
AD
C
Bit name
2 /
6
Address
) T
03D2
16
0 : Other than simultaneous sample sweep
1 : Simultaneous sample sweep mode or
Function varies with each operation mode
0 : Other than delayed trigger mode 0,1
1 : Delayed trigger mode 0,1
Function varies with each operation mode
mode or delayed trigger mode 0,1
delayed trigger mode 0,1
After reset
00
16
Function
RW
RW
RW
RW
14. A/D Converter
RW