MC56F8355VFGE Freescale Semiconductor, MC56F8355VFGE Datasheet - Page 118

• Manufacturer Part Number: MC56F8355VFGE
• Description: IC DSP 16BIT 60MHZ 128-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8355VFGE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 49
• Program Memory Size: 264KB (132K x 16)
• Program Memory Type: FLASH
• Ram Size: 10K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 128-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 49
• Data Ram Size: 20 KB
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, CAN
• Minimum Operating Temperature: - 40 C
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.5.9.13
Each bit controls clocks to the indicated peripheral.
6.5.9.14
Each bit controls clocks to the indicated peripheral.
6.5.9.15
Each bit controls clocks to the indicated peripheral.
6.5.9.16
Each bit controls clocks to the indicated peripheral.
6.5.10
The I/O Short Address Location registers are used to specify the memory referenced via the I/O short
address mode. The I/O short address mode allows the instruction to specify the lower six bits of address;
the upper address bits are not directly controllable. This register set allows limited control of the full
address, as shown in
Note:
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1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
I/O Short Address Location Register (SIM_ISALH and SIM_ISALL)
If this register is set to something other than the top of memory (EOnCE register space) and the EX bit
in the OMR is set to 1, the JTAG port cannot access the on-chip EOnCE registers, and debug functions
will be affected.
Serial Peripheral Interface 1 Enable (SPI1)—Bit 3
Serial Peripheral Interface 0 Enable (SPI0)—Bit 2
Pulse Width Modulator B Enable (PWMB)—Bit 1
Pulse Width Modulator A Enable (PWMA)—Bit 0
Figure
6-13.
56F8355 Technical Data, Rev. 17
Freescale Semiconductor
Preliminary