MAXQ2000-RAX+ Maxim Integrated Products, MAXQ2000-RAX+ Datasheet - Page 38

IC MCU 32K FLASH 68-QFN

MAXQ2000-RAX+

Manufacturer Part Number
MAXQ2000-RAX+
Description
IC MCU 32K FLASH 68-QFN
Manufacturer
Maxim Integrated Products
Series
MAXQ™r
Datasheet

Specifications of MAXQ2000-RAX+

Core Processor
RISC
Core Size
16-Bit
Speed
20MHz
Connectivity
1-Wire, SPI, UART/USART
Peripherals
LCD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 2.75 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
68-QFN Exposed Pad
Processor Series
MAXQ
Core
RISC
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
JTAG, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
55
Number Of Timers
3
Operating Supply Voltage
2.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Controller Family/series
MAXQ
No. Of I/o's
50
Ram Memory Size
2048Byte
Cpu Speed
20MHz
No. Of Timers
3
Embedded Interface Type
SPI, UART
Rohs Compliant
Yes
Development Tools By Supplier
MAXQ2000-KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Low-Power LCD Microcontroller
38
REVISION
NUMBER
0
1
2
3
4
5
6
7
8
9
____________________________________________________________________
REVISION
DATE
10/04
10/04
12/04
10/05
12/06
6/05
1/06
3/06
6/06
3/08
Initial release for QFN package variant.
New product release for TQFN package variant.
In the Features section under Peripheral Features, corrected accumulator to
show 48 bits (not 40 bits).
In the Electrical Characteristics table, added Active Current line for 2.2V,
20MHz flash operation; V
updated V
Replaced the package drawing for 56-pin package.
Added lead-free part numbers to the Ordering Information table.
In the Electrical Characteristics table under LCD Segment Voltage, clarified
wording on V
ISEGxx to 3μA.
Clarified that flash memory write/erase cycles and data retention specifications
are at +25°C.
Clarified V
values (0.8 x V
test program values (0.8 x V
presented values to test program values (0.2 x V
affect the testing or operation of the device.
Corrected typo on pin 38 (Pin Configuration) from P4/
Corrected Pb-free package number denotations. Should be MAXQ2000-RAX+
and MAXQ2000-RBX+.
Added Revision A3 typ and max conditions to I
Characteristics table.
Added 100-pin LQFP package.
Added EP lines and note to QFN and TQFN pin configurations.
Changed 4kWords Utility ROM (Memory Organization section) to 4kB.
Changed 4k x 16 Utility ROM (Figure 1) to 2k x 16 Utility ROM, changed 8FFFh
to 87FFh.
Changed 4kWord to 4kB (Utility ROM section).
Added V
Corrected references of
In the
rate specification is met.
Added QFN and TQFN package codes to the
removed package drawings and replaced with
Typical Operating
DD
IH
IH1
slew rate specification to
, V
ADJ
/V
IL
DDIO
IH3
, V
spec to V
OH
specifications, matching presented values to test program
); clarified VIH2 specification, matching presented values to
, and V
Circuit, added the reset monitor to ensure the V
IH2(MIN)
ADJ(MIN)
LCD
OL
to
data to match GBD/FTEC data.
); clarified V
DESCRIPTION
changed from 0.8 x V
.
= V
Electrical Characteristics
ADJ
and V
IL2
Ordering Information
specification, matching
Package Information
DD6
ADJ(MAX)
DDIO
in the Electrical
). These changes do not
DDIO
to P5.4/
= 0.1V; changed
to 0.75 x V
table.
.
table;
table.
DDIO
DD
Revision History
;
slew
1, 7–11, 30, 35, 42
CHANGED
1, 30, 34
PAGES
33, 34
2, 3
2, 3
5, 6
38
33
13
14
15
36
37
1
1
1
3
4
2
2

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