PIC16F636-I/ST Microchip Technology, PIC16F636-I/ST Datasheet - Page 124

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PIC16F636-I/ST

Manufacturer Part Number
PIC16F636-I/ST
Description
IC MCU FLASH 2KX14 14TSSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F636-I/ST

Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
14-TSSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LVD, POR, WDT
Number Of I /o
11
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232/SPI/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Package
14TSSOP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162057 - MPLAB ICD 2 HEADER 14DIP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Quantity
Price
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0
PIC12F635/PIC16F636/639
12.9.2
An overflow (FFh
the T0IF (INTCON<2>) bit. The interrupt can be
enabled/disabled by setting/clearing T0IE (INTCON<5>)
bit. See Section 5.0 “Timer0 Module” for operation of
the Timer0 module.
FIGURE 12-7:
DS41232B-page 122
TMR0 INTERRUPT
Note 1: PIC16F636/639 only.
IOC-RA0
IOC-RA1
IOC-RA2
IOC-RA3
IOC-RA4
IOC-RA5
TMR1IE
TMR1IF
C2IF
C2IE
IOCA0
IOCA1
IOCA2
IOCA3
IOCA4
IOCA5
OSFIF
OSFIE
LVDIF
LVDIE
CRIE
CRIF
EEIF
EEIE
C1IF
C1IE
(1)
00h) in the TMR0 register will set
(1)
INTERRUPT LOGIC
Preliminary
RAIE
INTF
INTE
RAIF
PEIE
T0IF
T0IE
GIE
12.9.3
An input change on PORTA change sets the RAIF
(INTCON<0>) bit. The interrupt can be enabled/
disabled by setting/clearing the RAIE (INTCON<3>)
bit. Plus, individual pins can be configured through the
IOCA register.
Note:
PORTA INTERRUPT
If a change on the I/O pin should occur
when the read operation is being executed
(start of the Q2 cycle), then the RAIF
interrupt flag may not get set.
Wake-up (If in Sleep mode)
© 2005 Microchip Technology Inc.
Interrupt to CPU

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