PIC16F636-I/ST Microchip Technology, PIC16F636-I/ST Datasheet - Page 133

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PIC16F636-I/ST

Manufacturer Part Number
PIC16F636-I/ST
Description
IC MCU FLASH 2KX14 14TSSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F636-I/ST

Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
14-TSSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LVD, POR, WDT
Number Of I /o
11
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232/SPI/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Package
14TSSOP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162057 - MPLAB ICD 2 HEADER 14DIP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Price
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0
13.0
The PIC12F635/PIC16F636/639 instruction set is
highly orthogonal and is comprised of three basic
categories:
• Byte-oriented operations
• Bit-oriented operations
• Literal and control operations
Each PIC16FXXX instruction is a 14-bit word divided
into an opcode, which specifies the instruction type
and one or more operands, which further specify the
operation of the instruction. The formats for each of the
categories is presented in Figure 13-1, while the
various opcode fields are summarized in Table 13-1.
Table 13-2 lists the instructions recognized by the
MPASM
instruction is also available in the “PICmicro
MCU Family Reference Manual” (DS33023).
For byte-oriented instructions, ‘f’ represents a file
register designator and ‘d’ represents a destination
designator. The file register designator specifies which
file register is to be used by the instruction.
The destination designator specifies where the result of
the operation is to be placed. If ‘d’ is zero, the result is
placed in the W register. If ‘d’ is one, the result is placed
in the file register specified in the instruction.
For bit-oriented instructions, ‘b’ represents a bit field
designator, which selects the bit affected by the
operation, while ‘f’ represents the address of the file in
which the bit is located.
For literal and control operations, ‘k’ represents an
8-bit or 11-bit constant, or literal value.
One instruction cycle consists of four oscillator periods;
for an oscillator frequency of 4 MHz, this gives a normal
instruction execution time of 1 s. All instructions are
executed within a single instruction cycle, unless a
conditional test is true, or the program counter is
changed as a result of an instruction. When this occurs,
the execution takes two instruction cycles, with the
second cycle executed as a NOP.
All instruction examples use the format ‘0xhh’ to
represent a hexadecimal number, where ‘h’ signifies a
hexadecimal digit.
13.1
Any instruction that specifies a file register as part of
the instruction performs a Read-Modify-Write (R-M-W)
operation. The register is read, the data is modified and
the result is stored according to either the instruction, or
the destination designator ‘d’. A read operation is
performed on a register even if the instruction writes to
that register.
© 2005 Microchip Technology Inc.
Note:
TM
INSTRUCTION SET SUMMARY
Read-Modify-Write Operations
assembler. A complete description of each
To maintain upward compatibility with
future products, do not use the OPTION
and TRIS instructions.
®
Mid-Range
PIC12F635/PIC16F636/639
Preliminary
For example, a CLRF GPIO instruction will read GPIO,
clear all the data bits, then write the result back to
GPIO. This example would have the unintended result
of clearing the condition that set the GPIF flag.
TABLE 13-1:
FIGURE 13-1:
Field
PC
TO
PD
f
W
b
k
x
d
Byte-oriented file register operations
Bit-oriented file register operations
Literal and control operations
General
CALL and GOTO instructions only
13
13
13
13
Register file address (0x00 to 0x7F)
Working register (accumulator)
Bit address within an 8-bit file register
Literal field, constant data or label
Don’t care location (= 0 or 1).
The assembler will generate code with x = 0.
It is the recommended form of use for
compatibility with all Microchip software tools.
Destination select; d = 0: store result in W,
d = 1: store result in file register f.
Default is d = 1.
Program Counter
Time-out bit
Power-down bit
OPCODE
d = 0 for destination W
d = 1 for destination f
f = 7-bit file register address
b = 3-bit bit address
f = 7-bit file register address
k = 8-bit immediate value
k = 11-bit immediate value
OPCODE
OPCODE
OPCODE
11
OPCODE FIELD
DESCRIPTIONS
10
10 9
GENERAL FORMAT FOR
INSTRUCTIONS
8
Description
b (BIT #)
7
d
8
6
7
7 6
k (literal)
DS41232B-page 131
f (FILE #)
k (literal)
f (FILE #)
0
0
0
0

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