PIC16F636-I/ST Microchip Technology, PIC16F636-I/ST Datasheet - Page 28

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PIC16F636-I/ST

Manufacturer Part Number
PIC16F636-I/ST
Description
IC MCU FLASH 2KX14 14TSSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F636-I/ST

Program Memory Type
FLASH
Program Memory Size
3.5KB (2K x 14)
Package / Case
14-TSSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LVD, POR, WDT
Number Of I /o
11
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
RS- 232/SPI/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Package
14TSSOP
Device Core
PIC
Family Name
PIC16
Maximum Speed
20 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162057 - MPLAB ICD 2 HEADER 14DIP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F636-I/ST
Manufacturer:
MICROCHIP
Quantity:
1 000
Part Number:
PIC16F636-I/ST
Manufacturer:
TOS
Quantity:
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Part Number:
PIC16F636-I/ST
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Part Number:
PIC16F636-I/ST
0
PIC12F635/PIC16F636/639
2.3
The Program Counter (PC) is 13 bits wide. The low byte
comes from the PCL register, which is a readable and
writable register. The high byte (PC<12:8>) is not
directly readable or writable and comes from PCLATH.
On any Reset, the PC is cleared. Figure 2-5 shows the
two situations for the loading of the PC. The upper
example in Figure 2-5 shows how the PC is loaded on a
write to PCL (PCLATH<4:0>
example in Figure 2-5 shows how the PC is loaded
during a CALL or GOTO instruction (PCLATH<4:3>
PCH).
FIGURE 2-5:
DS41232B-page 26
PC
PC
12
12 11 10
2
PCL and PCLATH
5
PCH
PCLATH<4:3>
PCH
PCLATH
PCLATH<4:0>
8
PCLATH
8
7
7
LOADING OF PC IN
DIFFERENT SITUATIONS
PCL
PCL
11
8
PCH). The lower
0
0
Instruction with
Opcode<10:0>
ALU Result
GOTO, CALL
Destination
PCL as
Preliminary
2.3.1
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF
performing a table read using a computed GOTO
method, care should be exercised if the table location
crosses a PCL memory boundary (each 256-byte
block). Refer to the Application Note AN556,
“Implementing a Table Read” (DS00556).
2.3.2
The PIC12F635/PIC16F636/639 family has an 8-
level x 13-bit wide hardware stack (see Figure 2-1).
The stack space is not part of either program or data
space and the Stack Pointer is not readable or writable.
The PC is PUSHed onto the stack when a CALL
instruction is executed or an interrupt causes a branch.
The stack is POPed in the event of a RETURN, RETLW
or a RETFIE instruction execution. PCLATH is not
affected by a PUSH or POP operation.
The stack operates as a circular buffer. This means that
after the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
Note 1: There are no Status bits to indicate stack
2: There are no instructions/mnemonics
COMPUTED GOTO
STACK
overflow or stack underflow conditions.
called PUSH or POP. These are actions
that occur from the execution of the CALL,
RETURN, RETLW and RETFIE instructions
or the vectoring to an interrupt address.
© 2005 Microchip Technology Inc.
PCL). When

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