Z8F0813SH005EC Zilog, Z8F0813SH005EC Datasheet - Page 100

• Manufacturer Part Number: Z8F0813SH005EC
• Description: IC Z8 ENCORE MCU FLASH 8K 20SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0813SH005EC

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: 269-3721

PS025203-0405
Watch-Dog Timer Reload Unlock Sequence
WDT Interrupt in STOP Mode
If configured to generate an interrupt when a time-out occurs and the Z8 Encore!
Z8F0823 Series are in STOP mode, the Watch-Dog Timer automatically initiates a STOP
Mode Recovery and generates an interrupt request. Both the WDT status bit and the STOP
bit in the Watch-Dog Timer Control register are set to 1 following a WDT time-out in
STOP mode. Refer to the chapter
information about STOP Mode Recovery.
If interrupts are enabled, following completion of the STOP Mode Recovery the eZ8 CPU
responds to the interrupt request by fetching the Watch-Dog Timer interrupt vector and
executing code from the vector address.
WDT Reset in NORMAL Operation
If configured to generate a Reset when a time-out occurs, the Watch-Dog Timer forces the
device into the System Reset state. The WDT status bit in the Watch-Dog Timer Control
register is set to 1. Refer to the chapter
more information about system reset.
WDT Reset in STOP Mode
If configured to generate a Reset when a time-out occurs and the device is in STOP mode,
the Watch-Dog Timer initiates a STOP Mode Recovery. Both the WDT status bit and the
STOP bit in the Watch-Dog Timer Control register are set to 1 following WDT time-out in
STOP mode. Refer to the chapter
information.
Writing the unlock sequence to the Watch-Dog Timer (WDTCTL) Control register address
unlocks the three Watch-Dog Timer Reload Byte registers (WDTU, WDTH, and WDTL)
to allow changes to the time-out period. These write operations to the WDTCTL register
address produce no effect on the bits in the WDTCTL register. The locking mechanism
prevents spurious writes to the Reload registers. The following sequence is required to
unlock the Watch-Dog Timer Reload Byte registers (WDTU, WDTH, and WDTL) for
write access.
1. Write 55
2. Write AA
3. Write the Watch-Dog Timer Reload Upper Byte register (WDTU).
4. Write the Watch-Dog Timer Reload High Byte register (WDTH).
5. Write the Watch-Dog Timer Reload Low Byte register (WDTL).
H
H
to the Watch-Dog Timer Control register (WDTCTL).
to the Watch-Dog Timer Control register (WDTCTL).
P R E L I M I N A R Y
“Reset and STOP Mode Recovery” on page 20
“Reset and STOP Mode Recovery” on page 20
“Reset and STOP Mode Recovery” on page 20
Z8 Encore!
Product Specification
®
Z8F0823 Series
Watch-Dog Timer
for more
for more
®
for
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