Z8F0813SH005EC Zilog, Z8F0813SH005EC Datasheet - Page 124

• Manufacturer Part Number: Z8F0813SH005EC
• Description: IC Z8 ENCORE MCU FLASH 8K 20SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0813SH005EC

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: 269-3721

PS025203-0405
Baud Rate
IR_RXD
UART’s
Clock
RXD
Caution:
Receiving IrDA Data
8 clock
delay
Start Bit = 0
Data received from the infrared transceiver using the IR_RXD signal through the RXD pin
is decoded by the Infrared Endec and passed to the UART. The UART’s baud rate clock is
used by the Infrared Endec to generate the demodulated signal (RXD) that drives the
UART. Each UART/Infrared data bit is 16-clocks wide. Figure 18 illustrates data recep-
tion. When the Infrared Endec is enabled, the UART’s RXD signal is internal to the Z8
Encore!
pin.
Infrared Data Reception
Endec Receiver Synchronization
The IrDA receiver uses a local baud rate clock counter (0 to 15 clock periods) to generate
an input stream for the UART and to create a sampling window for detection of incoming
pulses. The generated UART input (UART RXD) is delayed by 8 baud rate clock periods
with respect to the incoming IrDA data stream. When a falling edge in the input data
stream is detected, the Endec counter is reset. When the count reaches a value of 8, the
UART RXD value is updated to reflect the value of the decoded data. When the count
reaches 12 baud clock periods, the sampling window for the next incoming pulse opens.
The window remains open until the count again reaches 8 (in other words, 24 baud clock
periods since the previous pulse was detected), giving the Endec a sampling window of
16 clock
min. 1.4
period
The system clock frequency must be at least 1.0MHz to ensure proper reception of the
1.4µs minimum width pulses allowed by the IrDA standard.
pulse
Start Bit = 0
®
µ
Z8F0823 Series products while the IR_RXD signal is received through the RXD
16 clock
s
period
Data Bit 0 = 1
Figure 18.IrDA Data Reception
Data Bit 0 = 1
P R E L I M I N A R Y
16 clock
period
Data Bit 1 = 0
Data Bit 1 = 0
16 clock
period
Data Bit 2 = 1
Z8 Encore!
Data Bit 2 = 1
16 clock
period
Product Specification
Infrared Encoder/Decoder
Data Bit 3 = 1
®
Z8F0823 Series
Data Bit 3 = 1
107