MC68332AMEH20 Freescale Semiconductor, MC68332AMEH20 Datasheet - Page 55

• Manufacturer Part Number: MC68332AMEH20
• Description: IC MCU 32BIT 20MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332AMEH20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 132-QFP
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Data Ram Size: 2 KB
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Package: 132PQFP
• Device Core: ColdFire
• Family Name: 68K/M683xx
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.1.11 Quadrature Decode (QDEC)
5.2 MC68332G Time Functions
5.2.1 Table Stepper Motor (TSM)
5.2.2 New Input Capture/Transition Counter (NITC)
MC68332
MC68332TS/D
lation parameter. From 1 to 255 period measurements can be made and summed with the previous
measurement(s) before the TPU interrupts the CPU, allowing instantaneous or average frequency mea-
surement, and the latest complete accumulation (over the programmed number of periods).
The pulse width (high-time portion) of an input signal can be measured (up to 24 bits) and added to a
previous measurement over a programmable number of periods (1 to 255). This provides an instanta-
neous or average pulse-width measurement capability, allowing the latest complete accumulation (over
the specified number of periods) to always be available in a parameter. By using the output compare
function in conjunction with PPWA, an output signal can be generated that is proportional to a specified
input signal. The ratio of the input and output frequency is programmable. One or more output signals
with different frequencies, yet proportional and synchronized to a single input signal, can be generated
on separate channels.
The quadrature decode function uses two channels to decode a pair of out-of-phase signals in order to
present the CPU with directional information and a position value. It is particularly suitable for use with
slotted encoders employed in motor control. The function derives full resolution from the encoder sig-
nals and provides a 16-bit position counter with rollover/under indication via an interrupt.
The counter in parameter RAM is updated when a valid transition is detected on either one of the two
inputs. The counter is incremented or decremented depending on the lead/lag relationship of the two
signals at the time of servicing the transition. The user can read or write the counter at any time. The
counter is free running, overflowing to $0000 or underflowing to $FFFF depending on direction. The
QDEC function also provides a time stamp referenced to TCR1 for every valid signal edge and the abil-
ity for the host CPU to obtain the latest TCR1 value. This feature allows position interpolation by the
host CPU between counts at very slow count rates.
The following paragraphs describe factory-programmed time functions implemented in the motion-con-
trol microcode ROM. A complete description of the functions is beyond the scope of this summary. Re-
fer to Using the TPU Function Library and TPU Emulation Mode (TPUPN00/D) for more information
about specific functions.
The TSM function provides for acceleration and deceleration control of a stepper motor with a program-
mable number of step rates up to 58. TSM uses a table in PRAM, rather than an algorithm, to define
the stepper motor acceleration profile, allowing the user to fully define the profile. In addition, a slew rate
parameter allows fine control of the terminal running speed of the motor independent of the acceleration
table. The CPU need only write a desired position, and the TPU accelerates, slews, and decelerates
the motor to the required position. Full and half step support is provided for two-phase motors. In addi-
tion, a slew rate parameter allows fine control of the terminal running speed of the motor independent
of the acceleration table.
Any channel of the TPU can capture the value of a specified TCR or any specified location in parameter
RAM upon the occurrence of each transition or specified number of transitions, and then generate an
interrupt request to notify the bus master. The times of the most recent two transitions are maintained
in parameter RAM. A channel can perform input captures continually, or a channel can detect a single
transition or specified number of transitions, ceasing channel activity until reinitialization. After each
transition or specified number of transitions, the channel can generate a link to other channels.
Freescale Semiconductor, Inc.
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