MCIMX515DJM8C Freescale Semiconductor, MCIMX515DJM8C Datasheet - Page 118

• Manufacturer Part Number: MCIMX515DJM8C
• Description: MULTIMEDIA PROC 529-LFBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX51r

Specifications of MCIMX515DJM8C

• Core Processor: ARM Cortex-A8
• Core Size: 32-Bit
• Speed: 800MHz
• Connectivity: 1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 128
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.8 V ~ 1.15 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 529-LFBGA
• Processor Series: i.MX51
• Core: ARM Cortex A8
• Data Bus Width: 32 bit
• Program Memory Size: 36 KB
• Data Ram Size: 128 KB
• Interface Type: I2C, SPI, SSI, UART, USB
• Maximum Clock Frequency: 200 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 0.8 V to 1.15 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: MCIMX51EVKJ
• Minimum Operating Temperature: - 20 C
• Cpu Speed: 800MHz
• Digital Ic Case Style: BGA
• Supply Voltage Range: 0.8V To 1.15V
• Operating Temperature Range: -20°C To +85°C
• Leaded Process Compatible: Yes
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Electrical Characteristics
Figure 74
118
Parameter
ATA
—
—
t1
t2
t9
t3
t4
tA
t0
shows timing for PIO write and
from
Parameter
Figure 74
t2w
—
tA
—
—
—
t1
t9
t4
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
t2 (min) = time_2w
t1 (min) = time_1
t9 (min) = time_9
t3 (min) = (time_2w – time_on)
t4 (min) = time_4
tA = (1.5 + time_ax)
t0(min) = (time_1 + time_2 + time_9)
Avoid bus contention when switching buffer on by making ton long enough
Avoid bus contention when switching buffer off by making toff long enough
Figure 74. Multi-word DMA (MDMA) Timing
Table 93. PIO Write Timing Parameters
×
×
×
×
T – (tskew1 + tskew2 + tskew5)
T – (tskew1 + tskew2 + tskew6)
T – tskew1
×
Table 93
T – (tskew1 + tskew2 + tskew5)
T – (tco + tsui + tcable2 + tcable2 + 2
×
lists the timing parameters for PIO write.
T – (tskew1 + tskew2 +tskew5)
Value
×
T
×
tbuf)
Freescale Semiconductor
If not met, increase
time_1, time_2r,
Controlling
Variable
time_2w
time_2w
time_ax
time_9
time_4
time_9
time_1
—
—