ATTINY20-MMHR Atmel, ATTINY20-MMHR Datasheet - Page 100

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ATTINY20-MMHR

Manufacturer Part Number
ATTINY20-MMHR
Description
MCU AVR 2KB FLASH 12MHZ 20QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY20-MMHR

Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY20-MMHR
Manufacturer:
ATMEL
Quantity:
20 000
100
ATtiny20
Table 12-4
phase and frequency correct PWM mode.
Table 12-4.
Note:
• Bits 1:0 – WGM1[1:0]: Waveform Generation Mode
Combined with the WGM1[3:2] bits found in the TCCR1B Register, these bits control the count-
ing sequence of the counter, the source for maximum (TOP) counter value, and what type of
waveform generation to be used, see
Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode,
and three types of Pulse Width Modulation (PWM) modes.
Table 12-5.
Mode
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
COM1A1
COM1B1
0
0
1
1
A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set.
Correct PWM Mode” on page 90
WGM1
shows COM1x[1:0] bit functionality when WGM1[3:0] bits are set to phase correct or
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
[3:0]
Compare Output Mode, Phase Correct and Phase & Frequency Correct PWM
Waveform Generation Modes
Mode of
Operation
Normal
PWM, Phase Correct, 8-bit
PWM, Phase Correct, 9-bit
PWM, Phase Correct, 10-bit
CTC (
Fast PWM, 8-bit
Fast PWM, 9-bit
Fast PWM, 10-bit
PWM, Phase & Freq. Correct
PWM, Phase & Freq. Correct
PWM, Phase Correct
PWM, Phase Correct
CTC (
(Reserved)
Fast PWM
Fast PWM
COM1A0
COM1B0
0
1
0
1
Clear Timer on Compare
Clear Timer on Compare
Description
Normal port operation, OC1A/OC1B disconnected
WGM13=0: Normal port operation, OC1A/OC1B disconnected
WGM13=1: Toggle OC1A on Compare Match, OC1B reserved
Clear OC1A/OC1B on Compare Match when up-counting
Set OC1A/OC1B on Compare Match when downcounting
Set OC1A/OC1B on Compare Match when up-counting
Clear OC1A/OC1B on Compare Match when downcounting
for more details.
Table
12-5. Modes of operation supported by the
)
)
TOP
0xFFFF
0x00FF
0x01FF
0x03FF
OCR1A
0x00FF
0x01FF
0x03FF
ICR1
OCR1A
ICR1
OCR1A
ICR1
ICR1
OCR1A
(“Modes of Operation” on page
Update of
OCR1
Immediate
TOP
TOP
TOP
Immediate
TOP
TOP
TOP
BOTTOM
BOTTOM
TOP
TOP
Immediate
TOP
TOP
x
at
TOV1 Flag
Set on
MAX
BOTTOM
BOTTOM
BOTTOM
MAX
TOP
TOP
TOP
BOTTOM
BOTTOM
BOTTOM
BOTTOM
MAX
TOP
TOP
8235B–AVR–04/11
“Phase
86).

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