ATTINY20-MMHR Atmel, ATTINY20-MMHR Datasheet - Page 33

• Manufacturer Part Number: ATTINY20-MMHR
• Description: MCU AVR 2KB FLASH 12MHZ 20QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY20-MMHR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

8.3
8.3.1
8.4
8235B–AVR–04/11
Internal Voltage Reference
Watchdog Timer
Voltage Reference Enable Signals and Start-up Time
Figure 8-6.
ATtiny20 features an internal bandgap reference. This reference is used for Brown-out Detec-
tion, and it can be used as an input to the Analog Comparator or the ADC. The bandgap voltage
varies with supply voltage and temperature.
The voltage reference has a start-up time that may influence the way it should be used. The
start-up time is given in
reference is not always turned on. The reference is on during the following situations:
Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the user
must always allow the reference to start up before the output from the Analog Comparator or
ADC is used. To reduce power consumption in Power-down mode, the user can avoid the three
conditions above to ensure that the reference is turned off before entering Power-down mode.
The Watchdog Timer is clocked from an on-chip oscillator, which runs at 128 kHz. See
7 on page
adjusted as shown in
the Watchdog Timer. The Watchdog Timer is also reset when it is disabled and when a device
reset occurs. Ten different clock cycle periods can be selected to determine the reset period. If
the reset period expires without another Watchdog Reset, the ATtiny20 resets and executes
from the Reset Vector. For timing details on the Watchdog Reset, refer to
1. When the BOD is enabled (by programming the BODLEVEL[2:0] Fuse).
2. When the internal reference is connected to the Analog Comparator (by setting the
3. When the ADC is enabled.
INTERNAL
TIME-OUT
ACBG bit in ACSR).
RESET
RESET
V
34. By controlling the Watchdog Timer prescaler, the Watchdog Reset interval can be
CC
Brown-out Reset During Operation
Table 8-2 on page
“System and Reset Characteristics” on page
V
BOT-
36. The WDR – Watchdog Reset – instruction resets
V
t
TOUT
BOT+
175. To save power, the
Table 8-3 on page
ATtiny20
Figure 8-
36.
33