PIC16F88-E/P Microchip Technology, PIC16F88-E/P Datasheet - Page 81

• Manufacturer Part Number: PIC16F88-E/P
• Description: IC MCU FLASH 4KX14 EEPROM 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F88-E/P

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16F
• No. Of I/o's: 16
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 368Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ACICE0202 - ADAPTER MPLABICE 18P 300 MIL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

8.0
Timer2 is an 8-bit timer with a prescaler and a
postscaler. It can be used as the PWM time base for the
PWM mode of the CCP1 module. The TMR2 register is
readable and writable and is cleared on any device
Reset.
The input clock (F
1:4
T2CKPS1:T2CKPS0 (T2CON<1:0>).
The Timer2 module has an 8-bit period register, PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon Reset.
The match output of TMR2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive)
to generate a TMR2 interrupt (latched in flag bit
TMR2IF (PIR1<1>)).
Timer2 can be shut off by clearing control bit TMR2ON
(T2CON<2>) to minimize power consumption.
Register 8-1 shows the Timer2 Control register.
Additional information on timer modules is available in
the “PICmicro
Manual” (DS33023).
 2005 Microchip Technology Inc.
or
TIMER2 MODULE
1:16,
®
Mid-Range MCU Family Reference
OSC
selected
/4) has a prescale option of 1:1,
by
control
bits
8.1
The prescaler and postscaler counters are cleared
when any of the following occurs:
• A write to the TMR2 register
• A write to the T2CON register
• Any device Reset (Power-on Reset, MCLR, WDT
TMR2 is not cleared when T2CON is written.
8.2
The output of TMR2 (before the postscaler) is fed to the
Synchronous Serial Port module (SSP) which optionally
uses it to generate a shift clock.
FIGURE 8-1:
Note 1:
Reset or Brown-out Reset)
Sets Flag
bit TMR2IF
1:1
Postscaler
to
Timer2 Prescaler and Postscaler
Output of TMR2
TMR2 register output can be software selected by the
SSP module as a baud clock.
1:16
4
TMR2
Output
Reset
EQ
(1)
Comparator
PIC16F87/88
TMR2 reg
TIMER2 BLOCK DIAGRAM
PR2 reg
1:1, 1:4, 1:16
Prescaler
DS30487C-page 79
2
F
OSC
/4